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Professor

WANG, MU-CHUN Professor

WANG, MU-CHUN

Email

mucwang@must.edu.tw

Tel

3143

Education


1.Ph.D. in Institute of Electrical Engineering/ Texas A＆M University, USA in 1995.
2.M.E. in Institute of Electrical Engineering/ Texas A＆M University, USA in 1992.
3.B.S. in Dept. of Electro-Physics/ National Chiao-Tung Univ., Taiwan in 1986.


Experience


1.MDPI/ Molecules (Opportunities and Challenges in Organic Optoelectronic Materials) Guest editor 2025/01~ 2025/12
2.Chairman of Dept. of Electronic Engineering/ Minghsin Univ. of Science and Technology, 2023/08~ 2024/02.
3.MDPI/ Sensors (Precise Fiber Optic Sensors) Guest editor 2021/09~ 2022/11
4.MDPI/ Crystals (Nano-Semiconductors: Devices and Technology) Guest editor 2021/10~ 2023/03
5.MDPI/ Crystals (Optoelectronics and Photonics in Crystals) Guest editor 2022/02~ 2023/05
6.Sensors and Materials (Materials, Devices, Circuits, and Analytical Methods for Various Sensors) Guest editor 2023/03~ 2024/04
7.Director of Package and Testing Industry Center/ Minghsin Univ. of Science and Technology, 2019/1~ 2019/12.
8.Chairman of Dept. of Electronic Engineering/ Minghsin Univ. of Science and Technology, 2017/10~ 2019/07.
9.Professor at Dept. of Electronic Engineering/ Minghsin Univ. of Science and Technology, 2009/2~ present.
10.Associate professor at Dept. of Electronic Engineering/ Minghsin Univ. of Science and Technology, 2006/2~ 2009/1.
11.Assistant professor at Dept. of Electronic Engineering/ Minghsin Univ. of Science and Technology, 2003/8~ 2006/1.
12.Adjunct professor at Graduate Institute of Mechatronic Engineering/ National Taipei University of Technology, 2006/2~2017/07.
13.One of members of Nano-Si Device Design Center / National Taipei University of Technology, 2006/2~2018/07.
14.Director of Chip Research Center/ Minghsin Univ. of Science and Technology, 2008/8~ 2012/8.
15.Director of Mechatronic Integration Center/ Minghsin Univ. of Science and Technology, 2014/8~ 2017/7.
16.One of members of Nano-Si Device Design Center / National Taipei University of Technology, 2006/2~present.
17.One of members of RFID / National Taiwan University, 2008/4~2012/12.
18.Consultant of Excellent Company Association in ROC, 2011/6~ 2014/11.
19.Assistant professor at Dept. of Electrical Engineering/ Da-Yeh University, 2001/8~ 2003/7.
20.Senior device manager/ Technology Division/ United Microelectronics Corporation, 1997/4~ 2001/8.
21.Senior device engineer/ Technology Division/ Vanguard International Semiconductor Corporation, 1995/6~ 1997/4.
22.Failure analysis engineer/ QRA Division/ United Microelectronic Corporation, 1989/6~ 1990/7.
23.Electro-optic engineer/ Institute of Electro-optic/ ITRI, 1988/8~ 1989/6.
24.Members of IEEE, ECS, and ASME


TSMC, UMC, PowerChip, AUO, Delta, MOSChip, MOSEL, Winbond, ProMos, KLA, SPIL, ITRI, TSIA, NXP, EpiSil, MIC, Applied Materials in Taiwan, Analog Integrations Company, ThaiLin Tech., TCFST, JHIC in China, Chiplus, KLA-Tencor, Silicon Technology, HSP, IDB/MoEA, Electronic Training Center/NCTU.


Research Interest

Teaching classes: IC Process integration, Device Physics, Reliability Engineering, Semiconductor Physics, Nano-regime IC process, IC package technology, RF IC design, VLSI design/Analog circuit, Electromagnetics, Quantum electronics, Principles of TFT display, Probability, Micro-electronics, Engineering Math./ Recent extra job: Graduate advisor for the professional graduate students

Expertise: VLSI/Nano-node process integration, Nano-Si/high-k device design, Semiconductor Physics, VLSI/Nano-node Reliability engineering, TFT display characteristics, RF IC/RF ID design, Bio-sensors with Fabry-Perot optical fiber technique, IC failure analysis, IC package technology.


 

Research and working disciplines: Responsible, Assertive, and Honest; with love to Jesus Christ and people.

“For God so loved the world that he gave his one and only Son, that whoever believes in him shall not perish but have eternal life.” --- John 3:16 (Bible).

 

Papers collected time: 1998~ present

Total papers: 493; 474 papers at Minghsin University of Science and Technology (MUST); 463 papers at MUST from 2006 to present.

 

【Papers for Journals; SCI papers:52; EI papers:20; Others: 16】; IEEE conf. papers:120】

  1. Chow, Yu-Ting, Chao, Shou-Yen, Jiang, Pei-Cheng, Chang, Chung-Tzu, Zheng, Mei-Yuan, Wang, Mu-Chun, Chang, Cheng-Hsun-Tony, Lin, Chii-Ruey, Chen, Chia-Fu, Liu, Kuo-Wei, "Pioneering Fast and Safe Low-k Silicon Dioxide Synthesis for Modern Integrated Circuits" IEEE Transactions on Semiconductor Manufacturing 37(2), p.p. 185-189 (2024). (SCI IF2024:2.3)
  2. Wen Ching Hsieh*, Bing Mau Chen, Mu Chun Wang, Yih Shing Lee, Chien Chung Tsai, “Enhancing the Tunable Sensitivity of a NUV−VIS−NIR Photo Irradiance Sensor Using an IAZAOS,” Crystals, 13(11), 1530, Oct. 2023; https://doi.org/10.3390/cryst13111530. (SCI IF2022: 2.670)
  3. Shou-Yen Chao, Wen-How Lan, Shou-Kong Fan, Zi-Wen Zhon, Mu-Chun Wang*, “Electrical Performance of 28 nm-Node Varying Channel-Width nMOSFETs under DPN Process Treatments,” Micromachines, 13(11), 1861, Oct. 2022. (SCI IF2022: 3.523) doi: 10.3390/mi13111861
  4. Mu-Chun Wang*, Shou-Yen Chao, Chun-Yeon Lin *, Cheng-Hsun-Tony Chang, Wen-How Lan, “Low-Frequency Vibration Sensor with Dual Fiber Fabry-Perot Interferometer Using a Low-Coherence LED,” Crystals, 12(8), 1079, Aug. 2022. (SCI IF2021: 2.670)
  5. Wan-Chun Yang, David Jui-Yang Feng, Hsin-Hui Kuo, Ming-Chang Shih, Mu-Chun Wang, Chien-Jung Huang, and Wen-How Lan*, “Visible-light Photocatalytic Study of SnOx:N Islands on Bi2MoO6,” Sensors and Materials, 34(5), (2022) 1991–1999. (SCI IF2021:0.879) (Published on 2022/05/31)
  6. Shou-Yen Chao, Heng-Sheng Huang, Ping-Ray Huang, Chun-Yeon Lin, Mu-Chun Wang*, “Channel Mobility Model of Nano-Node MOSFETs Incorporating Drain-and-Gate Electric Fields,” Crystals, 12(2), 295, Feb. 2022. (SCI IF2021: 2.670)
  7. David Jui-Yang Feng, Chien-Yu Lai, Ming-Chang Shih, Millie Yang, Wen-How Lan*, Mu-Chun Wang, Cheng-Fu Yang*, “Study of N-doping in (Bi2MoO6, MoO3)/SnOx:N Photocatlyst in the Degradation of RhB Using Visible Light,” Modern Physics Letters B (MPLB), vol. 35, no. 29, pp. 2141007-1~ 2141007-12, June 2021. (SCI IF2020: 1.668)
  8. Mu-Chun Wang*, Wen-Ching Hsieh, Chii-Ruey Lin, Wei-Lun Chu, Wen-Shiang Liao, Wen-How Lan*, “High-drain Field Impacting Channel-length Modulation Effect for Nano-node n-channel FinFETs,” Crystals, 11(3), 262, Mar. 2021. (SCI IF2019: 2.404)
  9. Chii‐Wen Chen, Mu-Chun Wang*, Cheng-Hsun-Tony Chang, Wei-Lun Chu, Shun-Ping Sung, Wen‐How Lan*, “Hot Carrier Stress Sensing Bulk Current for 28-nm Stacked High-k nMOSFETs,” Electronics, 9(12), 2095, Dec. 2020. (SCI IF2019: 2.412)
  10. Chii‐Wen Chen, Shea-Jue Wang, Wen-Ching Hsieh, Jian-Ming Chen, Te Jong, Wen-How Lan*, and Mu-Chun Wang*, “Q-factor Performance of 28 nm-node High-k Gate Dielectric under DPN Treatment at Different Annealing Temperatures,” Electronics, 9(12), 2086, Dec. 2020. (SCI IF2019: 2.412)
  11. Ching-Chuan Chou, Tien-Szu Shen, Jian-Ming Chen, Cheng-Hsun-Tony Chang, Shea-Jue Wang, Wen-How Lan, Mu-Chun Wang*, “Uniformity of Gate Dielectric for I/O and Core HK/MG pMOSFETs with Nitridation Treatments,” Journal of Electronic Materials (JEMS), vol. 49, pp.6764–6775, May 2020. (SCI IF2018/2019: 1.676)
  12. Chun-An Chen, Yu-Ting Hsu, Wen-How Lan*, Kai-Feng Huang, Kuo-Jen Chang, Mu-Chun Wang, Chien-Jung Huang, “On the Nitrogen Doping in Erbium and Nitrogen Codoped Magnesium Zinc Oxide Diode by Spray Pyrolysis,” Crystals, vol.10, iss.34, pp.34-46, Jan. 2020 (SCI IF2017: 2.14).
  13. Tien-Szu Shen, Ching-Chuan Chou, Mu-Chun Wang*, Wen-Shiang Liao, Ting-Wei Chao, Wen-How Lan, “Electrical Characteristics of n-type FinFETs under VT Ion Implantation on SOI Substrate,” IEEE Transactions on Plasma Science, vol. 47, iss. 2, pp.1145-1151, Feb. 2019. (SCI IF2017: 1.253)
  14. Yu-Ting Hsu, Che-Chi Lee, Wen-How Lan*, Kai-Feng Huang, Kuo-Jen Chang, Jia-Ching Lin, Shao-Yi Lee, Wen-Jen Lin, Mu-Chun Wang and Chien-Jung Huang “Thickness Study of Er-Doped Magnesium Zinc Oxide Diode by Spray Pyrolysis,” Crystals, vol.8, pp.454-466, Dec. 2018 (SCI IF2017: 2.14)
  15. Shea-Jue Wang, Mu-Chun Wang*, Shih-Fan Chen, Yu-Hsiang Li, Tien-Szu Shen, Hui-Yun Bor, Chao-Nan Wei, “Electrical and physical characteristics of WO3/Ag/WO3 sandwich structure fabricated with magnetic-control sputtering metrology,” Sensors, vol.18, iss. 2803, pp.1-11, Aug. 2018. (SCI IF2018: 3.302)
  16. Heng-Sheng Huang, Wei-Lun Wang, Mu-Chun Wang*, Yu-Hao Chao, Shea-Jue Wang, Shuang-Yuan Chen, “I-V Model of Nano nMOSFETs Incorporating Drift and Diffusion Current,” Vacuum, vol.155, pp.76-82, June 2018. (SCI IF2016: 1.530).
  17. Shea-Jue Wang, Shun-Ping Sung, Mu-Chun Wang*, Heng-Sheng Huang, Shuang-Yuan Chen, Shou-Kong Fan, “Electrical Stress Probing Recovery Efficiency of 28nm HK/MG nMOSFETs using Decoupled Plasma Nitridation Treatment,” Vacuum, vol.153, pp.117-121, May 2018. (SCI IF2016: 1.530).
  18. Tzu-Hsiang Lin, Wen-How Lan*, Ming-Chang Shih, Mu-Chun Wang*, Kuo-Jen Chang, Jia-Ching Lin, Shao-Yi Lee, Wen-Jen Lin, and Chien-Jung Huang, “Resistance Study of Er-doped Zinc Oxide Diode by Spray Pyrolysis,” Sensors and Materials, vol. 30, no. 4, pp. 939–946, Apr. 2018. (SCIE IF2016: 0.519)
  19. Yue-Gie Liaw, Chii-Wen Chen, Wen-Shiang Liao, Mu-Chun Wang*, Xuecheng Zou, “Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs,” Modern Physics Letters B (MPLB), vol. 32, no. 15, pp. 1850157-1~ 1850157-12, May 2018. (SCI IF2016: 0.617)
  20. Yi-Fu Lu, Wen-How Lan*, Mu-Chun Wang*, Ming-Chang Shih, Hsin-Hui Kuo, David Jui-Yang Feng, Yi-Jen Chiu, Yung-Jr Hung, Cheng-Fu Yang, “Carrier Concentration of Calcium Zinc Oxide with Different Calcium Contents Deposited through Spray Pyrolysis,” (On-line) Microsystem Technologies (MITE), vol. 24, pp.4267–4272 (SCIE IF2016: 1.195), Feb., 2018.
  21. Fu-Yuan Tuan, Chii‐Wen Chen, Mu-Chun Wang*, Wen‐Shiang Liao, Shea-Jue Wang, Shou-Kong Fan, Wen‐How Lan*, “Thermal Stress Probing the Channel‐length Modulation Effect of Nano N-type FinFETs,” Microelectronics Reliability (MR), vol. 83, pp. 260-270, April 2018. (SCI IF2016: 1.371 )
  22. Yue-Gie Liaw, Wen-Shiang Liao*, Mu-Chun Wang*, Chii-Wen Chen, Deshi Li, Haoshuang Gu, and Xuecheng Zou, “Performance Characteristics of p-channel FinFETs with Varied Si-fin Extension Lengths for Source and Drain Contacts,” Semiconductors, vol.51, iss.12, pp1650–1655, Dec. 2017. (SCI IF 2015:0.693)
  23. Yue-Gie Liaw, Wen-Shiang Liao*, Mu-Chun Wang*, Cheng-Li Lin, Bin Zhou, Haoshuang Gu, Deshi Li, Xuecheng Zou, “A high aspect ratio silicon-fin FinFET fabricated upon SOI wafer,” Solid State Electronics, vo.126, pp.46-50, Dec. 2016. (SCI IF 2015: 1.345)
  24. Mu-Chun Wang*, Shea-Jue Wang, Shuang-Yuan Chen, Dai-Heng Wu, Jun-Wen Cai, Wen-How Lan, “The Integrity of 28nm HK/MG nMOSFETs Probed with Drain Bias Stress,” Advances in Engineering Research (ICEMIE2016), vol. 51, pp.67-71, May 2016. (ISSN 2352-5401)
  25. Mu-Chun Wang*, Shea-Jue Wang, Chii-Wen Chen, Zhi-Hong Xu, Wen-How Lan, “ DPN Treatment plus Annealing Temperatures for 28nm HK/MG nMOSFETs with CHC Stress,” Advances in Engineering Research (ICEMIE2016), vol. 51, pp.76-80, May 2016. (ISSN 2352-5401)
  26. Tzu-Yang Lin, Yu-Ting Hsu, Lung-Chien Chen, Mu-Chun Wang, Wei-Hsuan Hsu, Chun-Yi Lee, Sheng-Chung Huang, Yu-Xuan Ding, Kai-Feng Huang, and Wen-How Lan, “Conductivity Study of Nitrogen-Doped Magnesium Zinc Oxide Prepared by Spray Pyrolysis,” American Scientific Publishers / Material Focus, vol. 4, no.3, pp. 223–226, June 2015. (ISSN: 2169-429X)
  27. K..C. Lin*, P.C. Juan, C. H. Liu, M.C. Wang, C. H. Chou , “Leakage Current Mechanism and Effect of Y2O3 Doped with Zr High-K Gate Dielectrics,” Microelectronics Reliability (MR), Vol.55, Iss. 11, pp. 2198–2202, Nov. 2015. (SCI IF 2013: 1.214) (*: corresponding author) Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 124/248.
  28. Shea-Jue Wang, Mu-Chun Wang*, Shuang-Yuan Chen, Wen-How Lan, Bor-Wen Yang, LS Huang, Chuan-Hsi Liu, “Heat Stress Exposing Performance of Deep-nano HK/MG nMOSFETs using DPN or PDA Treatment,” Microelectronics Reliability (MR), Vol.55, Iss. 11, pp.2203-2207, Nov. 2015. (SCI IF 2013: 1.214) (*: corresponding author) Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 124/248.
  29. Win-Der Lee, Mu-Chun Wang*, Shea-Jue Wang, Wen-How Lan, Jie-Min Yang, LS Huang, “Comparison of electrical characteristics for SiONx and HfZrOx gate dielectrics of MOSFETs with decoupled plasma nitridation treatment,” Microelectronic Engineering (MEE), Vol. 138, pp. 97–101, Apr. 2015. (SCI IF 2013: 1.338), Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 110/248.
  30. Shea-Jue Wang, Mu-Chun Wang*, Win-Der Lee, Wen-Sheng Chen, Heng-Sheng Huang and Shuang-Yuan Chen, LS Huang and Chuan-Hsi Liu, “Kink effect for 28nm n-channel field-effect transistors after decoupled plasma nitridation treatment with annealing temperatures,” International Journal of Nanotechnology (IJNT), Vol.12, Nos. 1/2, pp.59-73, Jan. 2015. (SCI IF 2013: 1.144; ISSN: 1475-7435), Rank: MATERIALS SCIENCE, MULTIDISCIPLINARY: 149/251.
  31. Win-Der Lee, Mu-Chun Wang*, Shea-Jue Wang, Wen-How Lan, Chao-Wang Li, Bor-Wen Yang, “Modification of Early Effect for 28nm nMOSFETs Deposited with HfZrOx Dielectric after DPN Process Accompanying Nitrogen Concentrations,” IEEE Transactions on Plasma Science (TPS), Vol.42, No.12, Part I, pp.3747-3750, Dec. 2014. (SCI IF 2013: 0.95; ISSN:0093-3813), Rank: PHYSICS, FLUIDS & PLASMAS: 22/31.
  32. Shea-Jue Wang, Mu-Chun Wang*, Win-Der Lee, Jie-Min Yang, LS Huang, Heng-Sheng Huang, “Gate Leakage for 28nm Stacked HfZrOx Dielectric of p-channel MOSFETs after Decoupled Plasma Nitridation Treatment with Annealing Temperatures,” IEEE Transactions on Plasma Science (TPS), Vol.42, No.12, Part I, pp.3712-3715, Dec. 2014. (SCI IF 2013: 0.95; ISSN:0093-3813), Rank: PHYSICS, FLUIDS & PLASMAS: 22/31.
  33. Win-Der Lee, Mu-Chun Wang*, Shea-Jue Wang, Chun-Wei Lian, LS Huang, “Gate Leakage Characteristics for 28nm HfZrOx PMOSFETs after DPN Process Treatment with Different Nitrogen Concentration,” IEEE Transactions on Plasma Science (TPS), Vol.42, No.12, Part I, pp.3703-3705, Dec. 2014. (SCI IF 2013: 0.95; ISSN:0093-3813), Rank: PHYSICS, FLUIDS & PLASMAS: 22/31.
  34. Mu-Chun Wang, Heng-Sheng Huang, Min-Ru Peng, Shea-Jue Wang*, Tsao-Yeh Chen*, Wen-Shiang Liao, Hsin-Chia Yang, Chuan-Hsi Liu*, “Punch-through and junction breakdown characteristics for uniaxial strained nano-node metal-oxide-semiconductor field-effect transistors on (100) wafers,” (AMEE 2013) Int. J. Materials & Product Technology (IJMPT), Vol. 49, No. 1, pp.25–40, Apr. 2014. (SCI IF 2013: 0.282; ISSN print: 0268-1900) (*: corresponding author), Rank: MATERIALS SCIENCE, MULTIDISCIPLINARY: 234/251.
  35. Win-Der Lee, Mu-Chun Wang*, “Early Effect for 28nm HK/MG PMOSFETs after Post Deposition Annealing Treatment,” (CMME2014) Advanced Materials Research (AMR), Vol.910, pp.40-43, Mar. 2014. (EI ; ISSN: 1022-6680)
  36. Win-Der Lee, Mu-Chun Wang*, “Threshold Voltage Adjustment for 28nm HfOx/ZrOx/HfOx Gate Dielectric of nMOSFETs using DPN Process with Annealing Temperatures,” (CMME2014) Advanced Materials Research (AMR), Vol.910, pp.44-47, Mar. 2014. (EI ; ISSN: 1022-6680)
  37. Mu-Chun Wang, Shea-Jue Wang*, Heng-Sheng Huang, Shuang-Yuan Chen, Min-Ru Peng, Liang-Ru Ji, Ming-Feng Lu*, Wen-Shiang Liao, Chuan-Hsi Liu, “Characteristics and hot-carrier effects of strained pMOSFETs with SiGe channel and embedded SiGe source/drain stressors,” International Journal of Nanotechnology (IJNT), Vol. 11, No. 1/2/3/4, pp.62-74, Mar. 2014. (SCI IF 2012: 1.186 ), Rank: MATERIALS SCIENCE, MULTIDISCIPLINARY: 214/259.
  38. K.C. Lin, M.J. Twu, P.C. Juan, H.W. Hsu, H.S. Huang, M.C. Wang, C.H. Liu, "Impact of Stress Induced by Stressors on Hot Carrier Reliability of Strained nMOSFETs," International Journal of Nanotechnology (IJNT), Vol. 11, No. 1/2/3/4, pp.27-39, Mar. 2014.. (SCI IF 2012: 1.186 ), Rank: MATERIALS SCIENCE, MULTIDISCIPLINARY: 214/259.
  39. H. W. Hsu, H. S. Huang, C. C. Lee, S. Y. Chen, H. H. Teng, M. R. Peng, M. C. Wang, and C. H. Liu*, “Comparison of NMOSFET and PMOSFET Devices That Combine CESL Stressor and SiGe Channel,” Journal of Nanoscience and Nanotechnology (JNN), Vol. 13, No. 12, pp.8127-8132, Dec. 2013. (SCI IF 2012: 1.149), Rank: MATERIALS SCIENCE, MULTIDISCIPLINARY: 130/251.
  40. 王木俊, “奈米製程中應變工程對MOS元件效能之影響” (TSIA) 台灣半導體產業協會簡訊電子書, 第66期, pp.2-7, 10月, 2013. (新聞局版台省誌字第1086號)
  41. Hsin-Chia Yang*, Jui-Ming Tsai, Cheng-Huang Tsao, Mu-Chun Wang, Sungching Chi, Tsing-Yung Chang, “Mixers of Ultra-High Gain from 5.0 to 18.0 GHz,” Wireless Engineering and Technology (Scientific Research), Vol. 4, No. 1, pp. 1-4, Jan. 2013
  42. H. W. Hsu, H. W. Chen, H. S. Huang, C. P. Cheng, K. C. Lin, S. Y. Chen, M. C. Wang*, C. H. Liu*, “Time Dependent Dielectric Breakdown (TDDB) Characteristics of Metal-Oxide- Semiconductor Capacitors with HfLaO and HfZrLaO Ultra-Thin Gate Dielectrics,” Solid State Electronics (SSE), vol. 77, pp.2-6, Nov., 2012. (SCI IF2010: 1.438 ) (*: corresponding author), Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 88/243.
  43. Szu-Hung Chen, Wen-Shiang Liao, Hsin-Chia Yang, Shea-Jue Wang, Yue-Gie Liaw, Hao Wang, Haoshuang Gu and Mu-Chun Wang*, “High-Performance III-V MOSFET with Nano-stacked High-k Gate Dielectric and 3D Fin-shaped Structure,” Nanoscale Research Letters (NRL), vol. 7, iss.1, p.431, Aug. 2012. (SCI IF 2011: 2.73 ); Rank: MATERIALS SCIENCE, MULTIDISCIPLINARY: 44/241
  44. Piyas Samanta*, Heng-Sheng Huang, Shuang-Yuan Chen, Tsung-Jian Tzeng, and Mu-Chun Wang, “Interface trap generation and recovery mechanisms during and after positive bias stress in metal-oxide-semiconductor structures,” Applied Physics Letters (APL), vol. 100, pp. 203503-1~4, May 14, 2012. (SCI IF 2011: 3.844), Rank: PHYSICS, APPLIED: 20/128
  45. Chuan-Hsi Liu*, Hung-Wen Hsu, Hung-Wen Chen, Pi-Chun Juan, Mu-Chun Wang, Chin-Po Cheng, Heng-Sheng Huang, “Reliability Characteristics of Metal-Oxide-Semiconductor Capacitors with 0.72 nm Equivalent-Oxide-Thickness LaO/HfO2 Stacked Gate Dielectrics,” Microelectronic Engineering (MEE), vol. 89, pp.15-18, Jan., 2012. (SCI IF 2011: 1.557), Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 44/241.
  46. Wen-Shiang Liao*, Mu-Chun Wang, Yongming Hu, Szu-Hung Chen, Kun-Ming Chen, Yue-Gie Liaw, Cong Ye, Wenfeng Wang, Di Zhou, Hao Wang*, Haoshuang Gu, “Drive Current and Hot Carrier Reliability Improvements of High-aspect-ratio N-channel Fin-shaped Field Effect Transistor with High-tensile Contact Etching Stop Layer,” Applied Physics Letters (APL), vol. 99, pp.173505-1~3, Oct. 26, 2011. (SCI IF 2010: 3.841) (*: corresponding author), Rank: PHYSICS, APPLIED: 17/125.
  47. Mu-Chun Wang, Heng-Sheng Huang, Wen-Shiang Liao, Hsin-Chia Yang*, Ren-Hau Yang, Shuang-Yuan Chen, “CESL Deposition Enhancing Performance of n/pMOSFETs under 45-nm Process Manufacture,”  International Journal of Electrical Engineering (IJEE), vol.18, no.6, pp.285-290, Dec. 2011. (EI Journal; ISSN: 1812-3031)
  48. Mu-Chun Wang*, Hsin-Chia Yang, “Probing Drain Current with Vertical and Horizontal Electrical Fields under Temperature Stress on CLC TFTs,” (ADME2011) Advanced Materials Research (AMR), vol. 314-316, pp. 1922-1925, Aug., 2011. (EI ; ISSN: 1022-6680)
  49. Mu-Chun Wang*, Hsin-Chia Yang, “Instability Effect on CLC nTFTs with Positive-Bias Temperature Stress,” (ADME2011) Advanced Materials Research (AMR), vol. 314-316, pp. 1918-1921, Aug., 2011. (EI ; ISSN: 1022-6680)
  50. Mu-Chun Wang*, Hsin-Chia Yang, “Probing Active-Area Shift with Improved Kelvin Measurement for Trench DRAM,” (ADME2011) Advanced Materials Research (AMR), vol. 314-316, pp. 2474-2477, Aug., 2011. (EI ; ISSN: 1022-6680)
  51. Mu-Chun Wang*, Hsin-Chia Yang, “Collar TEOS Integrity of Deep Trench DRAM Capacitor with a Vertical Parasitic NMOSFET,” (ADME2011) Advanced Materials Research (AMR), vol. 314-316, pp. 2385-2388, Aug., 2011. (EI ; ISSN: 1022-6680)
  52. Mu-Chun Wang*, Hsin-Chia Yang, “Surface Channel Hot-Carrier Effect on CLC n-TFTs,” (ADME2011) Advanced Materials Research (AMR), vol. 314-316, pp. 1881-1884, Aug., 2011. (EI ; ISSN: 1022-6680)
  53. Mu-Chun Wang*, Hsin-Chia Yang, “Surface-Channel Drain-Avalanche Hot-Carrier Effect under Temperature Variation on CLC TFTs,” (ADME2011) Advanced Materials Research (AMR), vol. 314-316, pp. 1926-1929, Aug., 2011. (EI ; ISSN: 1022-6680)
  54. Mu-Chun Wang*, Hsin-Chia Yang, Yi-Jhen Li, “Minimization of Cascade Low-Noise Amplifier with 0.18um CMOS Process for 2.4 GHz RFID Applications,” (EEIC 2011), Lecture Notes in Electrical Engineering（Springer）(LNEE), vol. 97, Electronics and Signal Processing, pp. 571-578, June, 2011. (EI ; ISSN: 1876-1100)
  55. Mu-Chun Wang*, Hsin-Chia Yang, Ren-Hau Yang, “Parasitic Effect Degrading Cascode LNA Circuits with 0.18um CMOS Process for 2.4GHz RFID Applications,” (EEIC 2011), Lecture Notes in Electrical Engineering（Springer）(LNEE), vol. 97, Electronics and Signal Processing, pp. 561-569, June, 2011. (EI ; ISSN: 1876-1100)
  56. Mu-Chun Wang*, Hsin-Chia Yang, “A Monopole Scoop-Shape Antenna for 2.4GHz RFID Applications,” (EEIC 2011), Lecture Notes in Electrical Engineering（Springer）(LNEE), vol. 97, Electronics and Signal Processing, pp. 553-560, June, 2011. (EI ; ISSN: 1876-1100).
  57. Mu-Chun Wang*, Hsin-Chia Yang, Wen-Shiang Liao, “MOSFET Performance Manufactured on <100> Silicon Wafer Using CESL Strain Technology with Temperature Effect,” (AEMT2011) Advanced Materials Research (AMR), vol. 287-290, pp.2974-2977, July, 2011. (EI ; ISSN: 1022-6680)
  58. Mu-Chun Wang*, Hsin-Chia Yang, Wen-Shiang Liao, “Performance of Surface Carrier Mobility for Nano-node Strained (110) MOSFETs with Temperature Effect,” (AEMT2011) Advanced Materials Research (AMR), vol. 291-294, pp.3131-3134, July, 2011. (EI ; ISSN: 1022-6680)
  59. Mu-Chun Wang*, Hsin-Chia Yang, “A Non-destructive and Effective Metrology to Automatically Monitor Kink Effect of MOSFETs,” (AEMT2011) Advanced Materials Research (AMR), vol. 291-294, pp.2910-2913, July, 2011. (EI ; ISSN: 1022-6680).
  60. Hsin-Chia Yang*, Mu-Chun Wang, “Extensive 6.0-18.0 GHz Frequency Low Noise Amplifiers Integrated to Form LC-Feedback Oscillators,” (ACAM2011) Advanced Materials Research (AMR), vol. 225-226, pp. 1075-1079, Apr.., 2011. (EI ; ISSN: 1022-6680).
  61. Hsin-Chia Yang*, Mu-Chun Wang, “Evaluation of the Capacitances by Using High Frequency Roll-Off Fitting to the second order approximation,” (IISME2011) Advanced Materials Research (AMR), vol. 204-210, pp. 554-557, Feb. 2011. (EI ; ISSN: 1022-6680)
  62. Hsin-Chia Yang*, Mu-Chun Wang, “Evaluation of the Dielectric by Measuring Leakage Currents on Self-Built Capacitor-Like Devices,” (IISME2011) Advanced Materials Research (AMR), vol. 204-210, pp. 558-562, Feb. 2011. (EI ; ISSN: 1022-6680)
  63. Mu-Chun Wang*, Zhen-Ying Hsieh, Ching-Sung Liao, Chia-Hao Tu, Shuang-Yuan Chen, and Heng-Sheng Huang , ”Effective Edge Width for 65-nm pMOSFETs and Their Variations under CHC Stress,” IEEE/Electron Device Letters (EDL), vol. 32 (5), pp.387-389, May, 2011. (SCI IF 2010: 2.719), Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 23/245  
  64. Hsin-Chia Yang, Min-Ru Peng, Wen-Shiang Liao, Mu-Chun Wang*, Shuang-Yuan Chen, Heng-Sheng Huang, “Performance of Uni-axial Strained Nano-regime nMOSFETs with CESL Process on <100> Silicon Substrate,” 電子資訊---半導體光電技術專刊, 第16卷 第2期, pp.38-43, Jan. 2011. (ISSN: 1996796-9)
  65. Mu-Chun Wang*, Hsin-Chia Yang, Hong-Wen Hsu, Zhen-Ying Hsieh, Shuang-Yuan Chen, Shih-Ying Chang, and Chuan-Hsi Liu, “Degradation Mechanism for Continuous-Wave Green Laser-crystallized Polycrystalline Silicon n-Channel Thin-Film Transistors under Low Vertical-Field Hot-Carrier Stress with Different Laser Annealing Powers,” Japanese Journal of Applied Physics (JJAP), vol. 50, pp.04DH16-1~4, Apr., 2011. (SCI IF 2010: 1.024), Rank: PHYSICS, APPLIED: 76/125.
  66. Mu-Chun Wang, Chuan-Hsi Liu*, Kuo-Shu Huang, Zhen-Ying Hsieh, Shuang-Yuan Chen, Hsin-Chia Yang and Chii-Ruey Lin, “Promoting of Charged-Device Model/Electrostatic Discharge Immunity in the Dicing Saw Process,” Microelectronics Reliability, vol. 50, iss.6, pp.839-846, Mar., 2010. (SCI IF 2010: 1.066) (*: corresponding author), Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 113/247.
  67. Heng-Sheng Huang, Mu-Chun Wang*, Zhen-Ying Hsieh, Shuang-Yuan Chen, Ai-Erh Chuang, and Chuan-Hsi Liu, “Substrate Current Verifying Lateral Electrical Field under Forward Substrate Biases for nMOSFETs,” Solid-State Electronics (SSE), vol.54, iss. 5, pp.527–529, May, 2010. (SCI IF 2008: 1.422) (*: corresponding author), Rank: ENGINEERING, ELECTRICAL & ELECTRONIC: 80/247.
  68. Zhen-Ying Hsieh, Mu-Chun Wang*, Shuang-Yuan Chen, Chih Chen, and Heng-Sheng Huang, “ Gate-to-drain capacitance verifying the CGLC n-TFT trapped charges distribution under DC voltage stress,” Applied Physics Letters (APL), vol.95, iss. 25, 253503, Dec. 21, 2009 (SCI IF 2008: 3.726) (*: corresponding author)
  69. Zhen-Ying Hsieh, Mu-Chun Wang*, Chih Chen, Jia-Min Shieh, Yu-Ting Lin, Shuang-Yuan Chen, Heng-Sheng Huang, “Trend Transformation of Drain-current Degradation under Drain-avalanche Hot-carrier Stress for CLC n-TFTs,” Microelectronics Reliability, vol. 49, iss. 8, pp. 892-896, June, 17, 2009 (SCI IF 2008: 1.29) (*: corresponding author)
  70. Shuang-Yuan Chen*, Mu-Chun Wang, Shao-Min Ho, Wei-Yi Lin, Yeh-Ning Jou, Heng-Sheng Haung, ” Layout Dependence of ESD Characteristics on High Voltage LDMOS Transistors,” TamKang Journal of Science and Engineering, V11 N4, pp. 387-394 , Dec. 2008. (EI Journal; ISSN: 1560-6686)
  71. Yuan-Tai Tseng, Yun-Ju Chuang, Yi-Chien Wu, Chung-Shi Yang, Mu-Chun Wang and Fan-Gang Tseng*, “A gold-nanoparticle-enhanced immune sensor based on fiber optic interferometry,” Nanotechnology, vol.19, No. 34,  pp 345501- 1~9, Aug. 2008. (SCI IF 2007: 3.31)
  72. Chiao-Hao Tu*, Shuang-Yuan Chen, Meng-Hong Lin, Mu-Chun Wang, Ssu-Han Wu, Sam. Chou, Joe. Ko, Heng-Sheng Haung, “The Switch of the worst case on NBTI and hot carrier reliability for 0.13 um PMOSFETs,” Applied Surface Science, vol. 254, no. 19, pp.6186-6189, July 2008. (SCI IF 2007: 1.406)
  73. Mu-Chun Wang*, Zhen-Ying Hsieh, Heng-Sheng Huang, and Jon-En Wang, “Dual Fiber-Optic Fabry-Perot Interferometer Strain Sensor with Low-Cost Light-Emitting Diode Light Source,” Optical Engineering, vol. 47, no. 6, pp. 64401-1~-6, June 2008. (SCI IF 2007: 0.757)
  74. Mu-Chun Wang*, Zhen-Ying Hsieh, Yuan-Tai Tseng, Fan-Gang Tseng, Heng-Sheng Huang, Jon-En Wang, and Henry F. Taylor, “Dual Fiber-Optic Fabry-Perot Interferometer Temperature Sensor with Low-Cost Light-Emitting Diode Light Source,” Japanese Journal of Applied Physics, vol. 47, no. 4, pp. 3236-3239, April, 2008. (SCI IF 2008: 1.309) 
  75. Shuang-Yuan Chen*, Chia-Hao Tu, Jung-Chun Lin, Mu-Chun Wang, Po-Wei Kao, Memg-Hong Lin, Ssu-Han Wu, Ze-Wei Jhou, Sam Chou, Joe Ko, and Heng-Sheng Huang, “Investigation of DC Hot-Carrier Degradation at Elevated Temperatures for p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors of 0.13 um Technology,” Japanese Journal of Applied Physics, vol. 47, no. 3, pp. 1527-1531, March, 2008. (SCI IF 2008: 1.309)
  76. Mu-Chun Wang*, Zhen-Ying Hsieh, Chih Chen, Jia-Min Shieh, Yu-Ting Lin, Shio-Chao Lee, Shuang-Yuan Chen, Heng-Sheng Huang, ” Visible Light Source Disturbing the Source/Drain Current of CLC Poly-Si n-TFT Device ,” The Electrochemical Society (ECS) Transactions, vol. 16, iss. 9, pp.85-92, Oct, 2008.
  77. Mu-Chun Wang*, Zhen-Ying Hsieh, Yin-Chin Chu, Chih. Chen, Jia-Min Shieh, Yu-Ting Lin, Shio-Chao Lee, Heng-Sheng Huang, ” Enhanced Drain Current Ripple Variation with Vertical and Horizontal Electrical Fields under Optical Illumination ,” The Electrochemical Society (ECS) Transactions, vol. 16, iss. 9, pp. 93-101, Oct, 2008.
  78. Mu-Chun Wang*, Kuo-Su Huang, Zhen-Ying Hsieh, Heng-Sheng Huang,” Promotion of ESD-CDM Immunity in Dicing Saw Process,” The Electrochemical Society (ECS) Transactions, vol. 13, iss. 2, pp. 219-227, May, 2008.
  79. Mu-Chun Wang*, Zhen-Ying Hsieh, Jon-En Wang, Heng-Sheng Huang,” Dual FFPI Strain Sensor with Low-Cost LED Light Source,” The Electrochemical Society (ECS) Transactions, vol. 13, iss. 25, pp. 13-20, May, 2008.
  80. Mu-Chun Wang*, Zhen-Ying Hsieh , Chia-Hao Tu , Shuang-Yuan Chen , Hung-Wen Chen , Ai-Erh Chuang , Heng-Sheng Huang , Sam Chou,” Extra-Inversion Charge Enhancing Substrate Current During Increased Substrate Bias in 90nm Process,” The Electrochemical Society (ECS) Transactions, vol. 13,iss. 14, pp. 93-100, May, 2008.
  81. 王木俊、葉光益、謝禎穎、劉智銓、蔡政村[2005]”探討射頻積體電路矽基材單晶片的可行性,” Electron Technology Information magazine (e-科技雜誌), Vol.56, pp24-28, Aug., 2005, Taiwan
  82. 王木俊、徐見英、葉光益、謝禎穎、廖御傑[2005]”深次微米製程中元件NBTI與HCE的可靠性研討,”Electron Technology Information magazine (e-科技雜誌), Vol.55, pp48-52, July, 2005, Taiwan
  83. Mu-Chun Wang*, Hou-Ming Chen, Cheng-Tsun Tsai, Yung-Cehn Chen, and Liang-Te Lu ,” A Powerful Electrical Probing Method to Detect the Kink Effect of MOSFET Devices”, Journal of Da-Yeh University, No 1, Vol13, pp23-27, June, 2004, Taiwan.
  84. Mu-Chun Wang*, Hou-Ming Chen, Cheng-Tsun Tsai, Liang-Te Lu, and Yu-Chieh Liao, “Low Phase-Noise CMOS Voltage-Controlled Oscillator for ISM Band,” Journal of Da-Yeh University, No.1, Vol13, pp29-34, June, 2004, Taiwan.
  85. Mu-Chun Wang*, Hou-Ming Chen, Cheng-tsun Tsai, and Jin-Hua Hong,” A Powerful and Sensitive Gauge for Plasma-Process-Induced Damage in Differential Amplifier Circuit Design”, Journal of Da-Yeh University, No.1, Vol12, pp37-41, June, 2003, Taiwan.
  86. Howard T.H. Tang, S. S. Chen, Scott Liu, M. T. Lee, C. H. Liu, M. C. Wang, and M. C. Jeng, “ESD Protection for the Tolerant I/O Circuits using PESD Implantation,” J. of Electrostatics, Nos. 3-4, V54, pp293-300, Mar. 2002, USA. (SCI IF 2008: 1.24)
  87. C.J. Huang, Y.C. Liu, M. C. Wang, J.M. Caywood, S.F. Hong, A. Wu, L.C. Hsia, Y.J. Chang, and F.T. Liu “A Novel P-Channel Flash Electrically-Erasable Programmable Read-Only Memory(EEPROM) Cell with Oxide-Nitride-Oxide(ONO) as Split Gate Channel Dielectric”, Japanese Journal of Applied Physics., vol. 40, April, 2001, pp2943-2947. (SCI IF 2008: 1.309)
  88. Mu-Chun Wang, “An Introduction to Plasma Process Induced damage in VLSI process”, 1998 Electronic Monthly, Taiwan, pp112-126, Nov. 1998.

 

【Professional Books in Chinese】

 

  1. 王木俊/劉傳璽(國立師範大學/機電科技學系副教授): 「薄膜電晶體液晶顯示器原理與實務」 新文京開發出版公司發行 2008年 9月 ISBN: 978-986-150-944-0 (Chinese version) (http://www.wun-ching.com.tw)
  2. 鄭晃忠/劉傳璽主編 (王木俊等合著)「新世代積體電路製程技術」東華書局 2011年 9月ISBN：9789574836710 (Chinese version)

 

 

【Conference Papers】

 [Bio and Electro-optic Fields]

  1. M.C. Wang, Z.Y. Hsieh, H.S. Huang, J.E. Wang,” Dual FFPI Strain Sensor with Low-Cost LED Light Source,” 213th ECS Meeting, J1_1218, May 2008, Phoenix, USA.
  2. Mu-Chun Wang, Zhen-Ying Hsieh, Fan-Gang Tseng, Lih-Gen Sheu, and Heng-Sheng Huang, “Fabrication of Micro Cavity for a Dual FFPI Applying Micro Bio-Sensors,” 2007 IEEE/LEOS 5th Workshop on Fibers and Optical Passive Components (WFOPC 2007), W2A-5, pp.1-3, Dec., Taipei, Taiwan.
  3. Mu-Chun Wang, Zhen-Ying Hsieh, Jon-En Wang, and Henry F. Taylor, “Dual-FFPI Acoustic Sensor with a Low-Cost LED Light Source,” 2007 IEEE/LEOS 5th Workshop on Fibers and Optical Passive Components (WFOPC 2007), TH3B-2, pp.1-3, Dec. 2007, Taipei, Taiwan. 
  4. Mu-Chun Wang, Yuan-Tai Tseng, Fan-Gang Tseng, Jon-En Wang, and Henry F. Taylor, “Dual-FFPI Temperature Sensor with a Low-Cost LED Light Source,” 2007 International Conference on Solid State Devices and Materials (SSDM2007), pp98-99, Sept. 2007, Tsukuba, Japan.
  5. Mu-Chun Wang, Yuan-Tai Tseng, Zhen-Ying Hsieh, Fan-Gang Tseng, Jon-En Wang, and Henry F. Taylor, “Compensating Temperature Effect in Micro/Nano Bio-Sensor with a Dual FFPI,” 1st IEEE-NANOMED Conference, Aug. 6-9, 2007, Macau, China.
  6. Yuan-Tai Tseng, Yi-Chien Wu, Chung-Shi Yang, Mu-Chun Wang, and Fan-Gang Tseng, “Gold-Nanoparticle Enhanced In-Situ Immunosensor Based on Fiber-Optical Fabry-Perot Interferometry”, 5th IEEE Conference on Nanotechnology, July 11-15, 2005, Nagoya, Japan.
  7. Yuan-Tai Tseng, Ming-Chian Huang, Yi-Chien Wu, Chung-Shi Yang, Mu-Chun Wang, and Fan-Gang. Tseng, “Gold-Nanoparticle Enhanced in-Situ Biosensor Based on Fiber-Optical Fabry-Perot Interferometry”, 13th International Conference on Solid-State Sensors, Actuators and Microsystems, IEEE Transducers’05, pp1764-1767, June 8-12, 2005, Seoul, South Korea.
  8. 呂明峰、陳佳鎗、鄭遠東、王木俊、黃文增, “利用週期性介電質波導設計之環形共振分波器,” 2013光電與通訊工程研討會, 11月2013年, 高雄, 台灣. (Chinese version)
  9. Wei-Jhih Jian, Shea-Jue Wang, Chun-Yen Tai, Heng-Sheng Huang, Shuang-Yuan Chen, Mu-Chun Wang, “On the Degradation of Negative Bias Temperature Instability in a-Si:H TFTs,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID:74 (P1-04), Nov. 2013, Nantou, Taiwan.
  10. Shea-Jue Wang, Ssu-Hao Peng, You-Ming Hu, Shuang-Yuan Chen, Heng-Sheng Huang, Mu-Chun Wang*, Hsin-Chia Yang*, Chuan-Hsi Liu, “Electrical Performance of a-Si:H and Poly-Si TFTs with Heating Stress,” 2nd 2013 IEEE International Symposium on Next-Generation Electronics (ISNE), pp.309-312, Feb. 2013, Kaohsiung, Taiwan.
  11. Mu-Chun Wang, Ssu-Hao Peng, You-Ming Hu, Shuang-Yuan Chen, Heng-Sheng Huang, Shea-Jue Wang*, Chuan-Hsi Liu, “Electrical Characteristics of Amorphous and Poly-Crystalline Thin-Film Transistors with Temperature Effect,” 2012 IEDMS, paper ID: C007, Nov., 2012, Kaohsiung, Taiwan.
  12. Mu-Chun Wang, Hsin-Chia Yang, Shih-Ying Chang, Yi-Jhen Li, Heng-Sheng Huang, “C-V Analysis and Degradation of HC Stress near Vt Bias for CLC Poly-Si n-TFTs with Laser Annealing Powers,” 2010 International Electron Devices and Materials Symposia (IEDMS), paper number: B1-8, Nov. 2010, Taoyuan, Taiwan.
  13. Shih-Ying Chang, Mu-Chun Wang*, Zhen-Ying Hsieh and Chih Chen, “Degradation Mechanism for CLC Poly-Si n-TFTs under Low Vertical-Field HC Stress with Different Laser Annealing Powers,” 2010 International Conference on Solid State Devices and Materials (SSDM 2010), P-8-16, Sept., 2010, Tokyo, Japan.
  14. Mu-Chun Wang, Zhen-Ying Hsieh, Shih-Ying Chang, Hsin-Chia Yang, Chih Chen, Shuang-Yuan Chen, “Analysis of Degradation Mechanism for CLC poly-Si n-TFTs under Voltage Stress with Different Laser Annealing Powers,” 2009 International Electron Devices and Materials Symposia (IEDMS), paper number 231., Nov. 2009, Taoyuan, Taiwan.
  15. Mu-Chun Wang, Zhen-Ying Hsieh, Ren-Hau Yang, Chih Chen, Chia-Hao Tu, Heng-Sheng Huang, “Capacitance Analysis on Continuous-wave Green-Laser Crystallization of Thin-film Transistor under Voltage Stresses,” 2009 International Electron Devices and Materials Symposia (IEDMS), paper number 229., Nov. 2009, Taoyuan, Taiwan.
  16. Mu-Chun Wang, Zhen-Ying Hsieh, Hsiu-Yen Yang, Chih Chen, Hsin-Chia Yang, Shuang-Yuan Chen, “A Study of CHC Deterioration for CLC n-TFTs under Voltage Stresses,” 2009 International Electron Devices and Materials Symposia (IEDMS), paper number 230., Nov. 2009, Taoyuan, Taiwan.
  17. Mu-Chun Wang, Yin-Chin Chu, Zhen-Ying Hsieh, Shuang-Yuan Chen, “Deterioration Mechanisms of DAHC and CHC Stress at Different Green-Laser Annealing for CLC Poly-Si n-TFTs Illustrating with C-V Characteristics,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan.
  18. Mu-Chun Wang, Hsiu-Yen Yang, Zhen-Ying Hsieh, “Various Green Laser Annealings Impacting Performance of CLC Poly-Si n-TFTs with C-V Analysis,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan
  19. Mu-Chun Wang, Yi-Chun Teng, Zhen-Ying Hsieh, Shuang-Yuan Chen, “Trend Shift of Degradation Mechanisms of Various Annealing CLC Poly-Si n-TFTs under DAHC Stress and Temperature Enhancement,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan
  20. Mu-Chun Wang, Pin-Hsing Chiang, Zhen-Ying Hsieh, “Investigation of Positive Bias Temperature Instability in CLC Poly-Si n-TFTs under Different Laser Anneals,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan.
  21. Mu-Chun Wang, Hsiang-Lin Yang, Zhen-Ying Hsieh, “Investigation of Temperature Effect Transferring Electrical Characteristics of Different Annealing CLC Poly-Si n-TFTs,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan.
  22. Mu-Chun Wang, Shih-Ying Chang, Zhen-Ying Hsieh, “Investigation of DAHC Degradation for CLC Poly-Si n-TFTs with Tunable Green Laser Activation Energy,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan.
  23. Mu-Chun Wang, Chen-Jung Su, Zhen-Ying Hsieh, “Analysis of CHC Degradation for CLC TFTs with Adjustable Green Laser Activation,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan.
  24. Mu-Chun Wang, Zhen-Ying Hsieh, Chiao-Hao Tu, Shuang-Yuan Chen, Heng-Sheng Huang, “Analysis of Trap Charges with CLC Thin Film Transistor under DC stress,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2009, Taiwan.
  25. Mu-Chun Wang, Yin-Chin Chu, and Zhen-Ying Hsieh, “Deterioration Mechanisms of DAHC and CHC Stress for CLC Poly-Si n-TFTs Illustrating with C-V Characteristics,” 2009 International Academic Conference at Ming-Chuan University, Electronic Group, pp.97-104, Mar. 2009, Taoyan, Taiwan.
  26. Mu-Chun Wang, Shih-Ying Chang, and Zhen-Ying Hsieh, “Investigation of Transfer of the Degradation Mechanism on DAHC Reliability for CLC Poly-Si n-TFTs with Green-Laser Activation,” 2009 International Academic Conference at Ming-Chuan University, Electronic Group, pp.105-113, Mar. 2009, Taoyan, Taiwan.
  27. Mu-Chun Wang, Yi-Chun Teng, and Zhen-Ying Hsieh,” Trend Shift of Degradation Mechanisms of CLC Poly-Si n-TFTs under DAHC Stress and Temperature Enhancement,” 2009 International Academic Conference at Ming-Chuan University, Electronic Group, pp.114-122, Mar. 2009, Taoyan, Taiwan.
  28. Mu-Chun Wang, Pin-Hsing Chiang, and Zhen-Ying Hsieh, “Investigation of Degradation Mechanism of CLC n-TFTs under High Field and Temperature Stress,” 2009 International Academic Conference at Ming-Chuan University, Electronic Group, pp. 40-48, Mar. 2009, Taoyan, Taiwan.
  29. Mu-Chun Wang, Hsiu-Yen Yang, and Zhen-Ying Hsieh, “Analysis of Efficiency of CLC Poly-Si n-TFTs under Green-Laser and Furnace Activations,” 2009 International Academic Conference at Ming-Chuan University, Electronic Group, pp.49-56 , Mar. 2009, Taoyan, Taiwan.
  30. Mu-Chun Wang, Chen-Jung Su, and Zhen-Ying Hsieh, “A Study of Switch of CHC Reliability Degradation for CLC Poly-Si n-TFTs with Temperature Enhancement,” 2009 International Academic Conference at Ming-Chuan University, Electronic Group, pp.89-96, Mar. 2009, Taoyan, Taiwan.
  31. Mu-Chun Wang, Hsiang-Lin Yang, and Zhen-Ying Hsieh, “Investigation of Channel Current and Temperature Effect Transferring Electrical Characteristics of CLC Poly-Si n-TFTs,” 2009 International Academic Conference at Ming-Chuan University, Electronic Group, pp.57-65, Mar. 2009, Taoyan, Taiwan.
  32. Mu-Chun Wang, Zhen-Ying Hsieh, Yin-Chin Chu, Chih Chen, Hung-Wen Chen, Chia-Hao Tu, Shuang-Yuan Chen, Shio-Chao Lee, Heng-Sheng Huang, “C-V Characteristics of DAHC and CHC Stress for CLC Poly-Si n-TFTs,” 2008 International Electron Devices and Materials Symposia (IEDMS), CP555, pp.1-4, Nov. 2008, Taichung, Taiwan.
  33. Mu-Chun Wang, Zhen-Ying Hsieh, Hsiu-Yen Yang, Chih Chen, Yu-Ting Lin, Shio-Chao Lee, Jia-Min Shieh, Heng-Sheng Huang, “Performance of Green-Laser and Furnace Activations for CLC Poly-Si n-TFTs,” 2008 International Electron Devices and Materials Symposia (IEDMS), CP536, pp.1-4, Nov. 2008, Taichung, Taiwan.
  34. Mu-Chun Wang, Zhen-Ying Hsieh, Shih-Ying Chang, Chih Chen, Chia-Hao Tu, Shuang-Yuan Chen, Shio-Chao Lee, Heng-Sheng Huang, “The Switch of the Worse Case on DAHC Reliability for CLC poly-Si n-TFTs with Green-Laser Activation,” 2008 International Electron Devices and Materials Symposia (IEDMS), AP538, pp.1-4, Nov. 2008, Taichung, Taiwan.
  35. Zhen-Ying Hsieh, Mu-Chun Wang, Yi-Chun Teng, Chih Chen, Yu-Ting Lin, Shio-Chao Lee, Jia-Min Shieh, Heng-Sheng Huang, “Temperature Effect Healing DAHC Stress for CLC Poly-Si n-TFTs,” 2008 International Electron Devices and Materials Symposia (IEDMS), FP551, pp.1-4, Nov. 2008, Taichung, Taiwan.
  36. Zhen-Ying Hsieh, Mu-Chun Wang, Pin-Hsing Chiang, Chih Chen, Hung-Wen Chen, Shuang-Yuan Chen, Shio-Chao Lee, Heng-Sheng Huang, “CLC n-TFTs Deterioration under High Field-and-Temperature Stress,” 2008 International Electron Devices and Materials Symposia (IEDMS), FP534, pp.1-4, Nov. 2008, Taichung, Taiwan.
  37. Shio-Chao Lee, Mu-Chun Wang, Zhen-Ying Hsieh, Chen-Jung Su, Chih Chen, Yu-Ting Lin, Jia-Min Shieh, Heng-Sheng Huang, “Transformation of the Worst Case of CHC Reliability for CLC Poly-Si TFTs with Temperature Effect,” 2008 International Electron Devices and Materials Symposia (IEDMS), AP560, pp.1-4, Nov. 2008, Taichung, Taiwan.
  38. Shio-Chao Lee, Mu-Chun Wang, Zhen-Ying Hsieh, Hsiang-Lin Yang, Chih Chen, Yu-Ting Lin, Shuang-Yuan Chen, Heng-Sheng Huang, “Characteristic Transition of CLC Poly-Si n-TFTs Enhanced by Surface Current and Temperature Effects,” 2008 International Electron Devices and Materials Symposia (IEDMS), AP535, pp.1-4, Nov. 2008, Taichung, Taiwan.
  39. Mu-Chun Wang, Zhen-Ying Hsieh, Chih. Chen, Yu-Ting Lin, Chia-Hao Tu, Shuang-Yuan Chen, Shio-Chao Lee, Heng-Sheng Huang, “Analysis of GIDL Effect and C-V Characteristic on CLC Poly-Si n-TFT Device,” 2008 International Electron Devices and Materials Symposia (IEDMS), FP355, pp.1-3, Nov. 2008, Taichung, Taiwan.
  40. M.C. Wang, Z.Y. Hsieh, C. Chen, J.M. Shieh, Y.T. Lin, H.S. Huang, “Positive-Bias Temperature Instability Effect on CLC TFTs,” 4th Vacuum and Surface Sciences Conference of Asia and Australia (VASSCAA-4), pp.298, Oct. 2008, Matsue City, Japan. 
  41. M.C. Wang, Z.Y. Hsieh, C. Chen, J.M. Shieh, Y.T. Lin, H.S. Huang, “Enhanced Drain Current with Vertical and Horizontal Electrical Fields under Temperature Effect on CLC TFTs,” 4th Vacuum and Surface Sciences Conference of Asia and Australia (VASSCAA-4), pp.406, Oct. 2008, Matsue City, Japan. 
  42. M.C. Wang, Z.Y. Hsieh, C. Chen, J.M. Shieh, Y.T. Lin, C.R. Lin, “Channel Hot-Carrier Effect on CLC n-TFTs,” 4th Vacuum and Surface Sciences Conference of Asia and Australia (VASSCAA-4), pp. 78, Oct. 2008, Matsue City, Japan. 
  43. M.C. Wang, Z.Y. Hsieh, C. Chen, J.M. Shieh, Y.T. Lin, S.Y. Chen, “Drain-Avalanche Hot-Carrier Effect under Temperature Variation on CLC TFTs,” 4th Vacuum and Surface Sciences Conference of Asia and Australia (VASSCAA-4), pp.141, Oct. 2008, Matsue City, Japan.
  44. M.C. Wang, Z.Y. Hsieh, C. Chen, J.M. Shieh, Y.T. Lin, H.S. Huang, “Visible Light Source Disturbing the Source/Drain Current of CLC Poly-Si n-TFT Device,” 214th ECS Meeting, E13_2269, Oct. 2008, Honolulu, USA.
  45. M.C. Wang, Z.Y. Hsieh, Y.C. Chu, C. Chen, J.M. Shieh, Y.T. Lin,” Enhanced Drain Current Ripple Variation with Vertical and Horizontal Electrical Fields under Optical Illumination,” 214th ECS Meeting, E13_2270, Oct. 2008, Honolulu, USA.

 

[IC Circuit Design]

  1. Hsuan Chang, Fu-Kuo Hsu, Yang-Shine Lee and Mu-Chun Wang*, “A Prototype of Mini-wireless Remote Monitoring Control System Applied to Delicate Agriculture,” (Accepted) International Conference on Earth Observations and Societal Impacts, 2018 (ICEO&SI 2018), July 2018, Hsinchu, Taiwan.
  2. Hsin-Chia Yang, Ssu-Hao Peng, Shea-Jue Wang*, Mu-Chun Wang*, Chun-Wei Lian, Jie-Min Yang, Hung-I Chin, Chuan-Hsi Liu, “High Quality of 0.18um CMOS 5.2GHz Cascode LNA for RFID Tag Applications,” 2nd 2013 IEEE International Symposium on Next-Generation Electronics (ISNE), pp.313-316, Feb. 2013, Kaohsiung, Taiwan.
  3. Hsin-Chia Yang, Jui-Ming Tsai, Jhe-Chuan Yeh, Cheng-Huang Tsao, Sungching Chi, Tsing-Yung Chang, Mu-Chun Wang, “Promising Low Noise Amplifiers Using 90nm CMOSFET Devices,” IEEE/ 8th International Conference on Wireless Communications, Network and Mobile Computing (WiCOM 2012), Sept. 2012, Shanghai, China.
  4. 王木俊*、張敬宗、吳國維、楊信佳、陳肇業,“0.18微米製程2.4GHz高輸出增益與低雜訊指數疊接式低雜訊放大器整合於RFID晶片”2012電子工程技術研討會, 高雄, 台灣, 6月1日 2012. (Chinese version)
  5. 王木俊*、彭思豪、吳國維、楊信佳、陳肇業,“0.18微米製程5.2/5.8GHz高增益與絕佳隔離之疊接式低雜訊放大器應用於射頻鑑別系統”2012電子工程技術研討會, 高雄, 台灣, 6月1日 2012. (口頭優秀論文獎) (Chinese version)
  6. Mu-Chun Wang*, Ssu-Hao Peng, Hsin-Chia Yang, Tsao-Yeh Chen, “2.4GHz High Gain and High Isolation of Cascade Low Noise Amplifier in RFID,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, System Design Group, paper number D16., May, 2012, Taiwan.
  7. Hsin-Chia Yang, Chuei-Tang Wang, Ming-Der Chang, Mu-Chun Wang, Sungching Chi, “3.5 GHz to 10.0 GHz Mixers of High Gain and Good Isolations,” IEEE/ 7th International Conference on Wireless Communications, Network and Mobile Computing (WiCOM 2011), pp.1-3, Sept., 2011, Wuhan, China
  8. Ming-Te Chang*, Kan-Tse Yeh, Hsin-Chia Yang, Mu-Chun Wang, “6.0-10.1 GHz High-Gain Mixer,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, System Design Group, paper number D17., May, 2011, Taiwan.
  9. Jhe-Chuen Yeh*, Hsin-Chia Yang, Kan-Tse Yeh, Mu-Chun Wang, “12GHz~ 18GHz High Gain Low Noise Amplifier,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Signal and System Group, paper number E11., May, 2011, Taiwan.
  10. Chang-Chih Hsieh, Ren-Hau Yang, Hsin-Chia Yang, Kuo-Hua Wu, and Mu-Chun Wang*, “ Miniaturization of Cascode Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID,” 2010 Asia Pacific International Conference on RFID (APICOR), paper number 46, Dec., 2010, Taipei, Taiwan.
  11. Chang-Chih Hsieh, Yi-Jhen Li, Hsin-Chia Yang, Ren-Hau Yang, and Mu-Chun Wang*, “Minimizing Size of Cascade Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID,” 2010 Asia Pacific International Conference on RFID (APICOR), paper number 38, Dec., 2010, Taipei, Taiwan.
  12. Mu-Chun Wang*, Long-Sian Lin, Chang-Chih Hsieh, and You-Ming Hu, “Optimization of First-Stage cascode Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID Applications,” 2010 Asia Pacific International Conference on RFID (APICOR), paper number 54, Dec., 2010, Taipei, Taiwan.
  13. Hsin-Chia Yang, Yao-Yuan Hoe, Ming-Feng Lu, Mu-Chun Wang*, You-Ming Hu, “Contrivance and Proof of Ladder-Like Antenna for 2.46GHz RFID Applications,” 2010 Asia Pacific International Conference on RFID (APICOR), paper number 53, Dec., 2010, Taipei, Taiwan.
  14. Hsin-Chia Yang, Yao-Yuan Hoe, Ming-Feng Lu, Mu-Chun Wang*, You-Ming Hu, “Design and Proof of Spiral-Like Antenna for 2.45GHz RFID Tag Applications,” 2010 Asia Pacific International Conference on RFID (APICOR), paper number 50, Dec., 2010, Taipei, Taiwan.
  15. Hsin-Chia Yang, Yi-Cheng Luo, Ming-Feng Lu, Mu-Chun Wang*, You-Ming Hu, “Clamp-Like Planar Antenna for 2.45GHz RFID Tag Applications,” 2010 Asia Pacific International Conference on RFID (APICOR), paper number 52, Dec., 2010, Taipei, Taiwan.
  16. Hsin-Chia Yang, Ming-Der Chang, Kan-Tse Yeh, Sungching Chi, Mu-Chun Wang, Chuei-Tang Wang “Promising 5.0-16.0 GHz CMOS-Based Oscillators with Tuned LC Tank,” IEEE/ 6th International Conference on Wireless Communications, Network and Mobile Computing (WiCOM 2010), Sept., 2010, Chengdu, China
  17. Mu-Chun Wang, Ren-Hau Yang, Zhen-Ying Hsieh, Hsin-Chia Yang, Chii-Ruey Lin, “Promising Cascade Low-Noise Amplifier with 0.18 um CMOS Process for 2.4GHz RFID,” 2009 Asia Pacific International Conference on RFID (APICOR), paper number 57, Dec., 2009, Taipei, Taiwan.
  18. Mu-Chun Wang, Ting-Yu Yang, Zhen-Ying Hsieh, Hsin-Chia Yang, Chuan-Hsi Liu, Chii-Ruey Lin, “Optimization of Solderability for 2.4GHz RF Printed-Circuit-Board Products,” IEEE/IMPACT, pp.227-230, Oct., 2009, Taipei, Taiwan
  19. Mu-Chun Wang, Zhen-Ying Hsieh, Yin-Chin Chu, Hsiu-Yen Yang, “Contrivance and Proof of FET-Shape Micro-Strip Antenna Applied at 2.45GHz RFID Tags,” 2009 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, pp , Aug., 2009, Tianjin, China.
  20. Mu-Chun Wang, Hsiu-Yen Yang, Yin-Chin Chu, Zhen-Ying Hsieh, “Design and Proof of Pseudo Z-Shape Antenna Applied at 2.45 GHz RFID Tags,” 2009 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, pp , Aug., 2009, Tianjin, China.
  21. Mu-Chun Wang, Shih-Ying Chang, Zhen-Ying Hsieh, Chen-Jung Su, “First-Stage Cascode Ultra-Low-Noise Amplifier with 0.18mm CMOS Process for 2.4GHz RFID Applications,” 2009 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, pp , Aug., 2009, Tianjin, China. (優秀論文獎)
  22. Mu-Chun Wang, Zhen-Ying Hsieh, Chiao-Hao Tu, Shuang-Yuan Chen, Heng-Sheng Huang, “A High Power-added Efficiency of Power Amplifier for 2.4GHz RFID Applications Embedded with 0.18 mm CMOS Process,” 2009 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, Aug., 2009, Tianjin, China. (Excellent Paper Award)
  23. 王木俊、謝禎穎、涂家豪、黃恆盛, “0.25微米CMOS E-級功率放大器應用於2.4GHz RF ID傳輸之模擬,”  2009兩岸 RFID科技產業應用研討會,論文序號 86, pp. 1-4, 1月8-9日, 台北, 台灣. (Chinese version)
  24. 王木俊、謝禎穎、涂家豪、黃恆盛, “0.25微米CMOS低雜訊壓控振盪器應用於2.4GHz RF ID傳輸之模擬,”  2009兩岸 RFID科技產業應用研討會, 論文序號 87, pp. 1-4, 1月8-9日,, 台北, 台灣. (Chinese version)
  25. Mu-Chun Wang, Zhen-Ying Hsieh, Chung-Hsin Kuo, Chun-Wei Huang, Shuang-Yuan Chen, “Simulation and Improvement of 5GHz Power Divider on FR-4 PCB,” 2008 ASME/ International Conference and Exhibition on Integration and Commercialization of Micro and Nano-systems, MNC-2008_70090, June, 2008, Hong-Kong, China.
  26. Mu-Chun Wang, Zhen-Ying Hsieh , Shu-Han Chao, Chia-Hao Tu, Shuang-Yuan Chen, “Correcting Front-end RF Impedance Mismatch for 2.4 GHz Wireless Long-Distance Data Transmission,” 2008 ASME/ International Conference and Exhibition on Integration and Commercialization of Micro and Nano-systems, MNC-2008_70092, June, 2008, Hong-Kong, China.
  27. Mu-Chun Wang, Zhen-Ying Hsieh ,Ting-Yu Yang, Chia-Hao Tu, Shuang-Yuan Chen, “Improvement of Printed Circuit Board Assembly Process in 2.4 GHz RF Circuit Products,” 2008 ASME/ International Conference and Exhibition on Integration and Commercialization of Micro and Nano-systems, MNC-2008_70093, June, 2008, Hong-Kong, China.
  28. 王木俊、趙書漢、鄧怡群, “射頻電路的阻抗匹配對長距離資料傳輸之影響,” 2008 第六屆微電子技術發展與應用研討會, 系統元件組, pp.379-386, 五月, 2008, 高雄 台灣. (Chinese version)
  29. 王木俊、楊婷伃、江品姓, “2.4GHz射頻電路印刷電路板組裝之製程改良,” 2008 第六屆微電子技術發展與應用研討會, 半導體封裝組, pp.316-322, 五月, 2008, 高雄 台灣. (Chinese version)
  30. 王木俊 、郭宗信、朱瑩鈞, “在FR-4印刷電路板上5GHz功率分工器之改良,” 2008 第六屆微電子技術發展與應用研討會, 系統元件組, pp. 372-378, 五月, 2008, 高雄 台灣. (Chinese version)
  31. Mu-Chun Wang, Zhen-Ying Hsieh, Hui-Fang Lee, Shuang-Yuan Chen, Heng-Sheng Huang, “Design and Verification of Front-end Transmitter and Receiver Module for 2.4GHz Wi-Fi Application,” 2007 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, pp169-173, Aug., 2007, Anwei, China.
  32. Mu-Chun Wang, Hui-Fang Lee, Zhen-Ying Hsieh, Shuang-Yuan Chen, Heng-Sheng Huang, “Design and Verification of a Monopole Trench-Shape Antenna for 2.4GHz Wi-Fi Applications,” 2007 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, pp185-189, Aug., 2007, Anwei, China.
  33. Mu-Chun Wang, Zhen-Ying Hsieh, Cheng-Yi Ke, Shuang-Yuan Chen, Heng-Sheng Huang,” A 5.8GHz Band-Pass Filter with an Active Inductor through 0.18um Full- CMOS Process for Wireless Transceivers,” 2007 ASME/ International Conference on Integration and Commercialization of Micro and Nano-systems, Mico and Nano Devices, MNC-2007_21085, Jan., Sanya, China.
  34. Mu-Chun Wang, Zhen-Ying Hsieh, Chieu-Ying Hsu, Shuang-Yuan Chen, Heng-Sheng Huang,” A 2.4-GHz 0.18 µm Full-CMOS Single-Stage Class-E Power Amplifier with Temperature Effect for ISM Band Wireless Communication,” 2007 ASME/ International Conference on Integration and Commercialization of Micro and Nano-systems, Mico and Nano Devices, MNC-2007_21086, Jan., Sanya, China.
  35. Mu-Chun Wang, Zhen-Ying Hsieh, Chien-Chih Chen, Shuang-Yuan Chen, Heng-Sheng Huang,” Design of a 0.18um Stable Non-Volatile Boost Circuit in High/Low Temperature Operation,” 2007 ASME/ International Conference on Integration and Commercialization of Micro and Nano-systems, Mico and Nano Devices, MNC-2007_21083, Jan., Sanya, China.
  36. Mu-Chun Wang, Cheng-Yi Ke, Yi-Chang Cheng, and Chien-Chih Chen, “A 5.2GHz Band-pass Filter with an Active Inductor under 0.18 um Full-CMOS Process for Wireless Transceivers,” 2006 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, pp.288-291, Aug., 2006, Macau, China.
  37. Mu-Chun Wang, Cheng-Yi Ke, Yi-Chang Cheng, and Chien-Chih Chen, ” Temperature Impact to a 2.4GHz Band-Pass Filter with an Active Inductor under 0.18um CMOS Process for ISM Band Wireless Communication,” 2006 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, pp.292-295, Aug., 2006, Macau, China.
  38. Mu-Chun Wang, Chien-Chih Chen, Jun-Ye Jhong, Cheng-Yi Ke, and Chieu-Ying Hsu, “Design of a 0.18um Non-Volatile Boost Circuit,” International Academic Conference at Ming-Chuan University, Electronic Group, pp.17-24, Mar., 2006, Taoyan, Taiwan.
  39. Mu-Chun Wang, Chieu-Ying Hsu, Chun-Ya Chuang, Racy J-H Cheng, and Ming Hsian Weng, “A 2.4GHz Class-E Power Amplifier with 0.18 um Dual-Gate Full- CMOS Process for ISM Band Wireless Communication,” International Academic Conference at Ming-Chuan University, Electronic Group, pp.85-91, Mar., 2006, Taoyan, Taiwan.
  40. Mu-Chun Wang, Cheng-Yi Ke, Jun-Ye Jhong, Chien-Chih Chen, Wu-Jie Wen, “A 2.4GHz Band-pass Filter with an Active Inductor under 0.18μm CMOS Process for ISM Band Wireless Communication,” International Academic Conference at Ming-Chuan University, Computer and Communication Group, pp.28-35, Mar., 2006, Taoyan, Taiwan.
  41. Mu-Chun Wang, Guang-Yi Yeh, Yi-Chang Cheng, Hsin-Chia Yang, Chieu-Ying Hsu, “A 2.4GHz Class-E Full CMOS Power Amplifier with Quarter-micron Process for ISM Band Wireless Communication,” 2005 International Academic Conference at Ming-Chuan University, Electronic Group, pp41-47, Mar., 2005, Taiwan.
  42. Kuo-Yu Chan, Yi-Chang Cheng, Hsin-Chia Yang, Mu-Chun Wang, and Chung-Chih Chi, “Design and Simulation 2.4GHz CMOS Down-Conversion Double Balanced Mixer for Wireless Communication,” 2005 International Academic Conference at Ming-Chuan University, Electronic Group, pp29-36, Mar., 2005, Taiwan. 
  43. Mu-Chun Wang, Hou-Ming Chen, Yu-Chieh Liao, and Cheng-Tsun Tsai, “Full-CMOS 2.4-GHz Low-Noise Amplifier for ISM-Band Wireless Communication,” 2004 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, ppD2-1~D2-5, Sept., 2004, Taiwan.
  44. Yi-Chang Cheng and Mu-Chun Wang, “Design of the 2.4GHz CMOS Microwave Mixer”, Proceedings of the 2004 China-Japan Joint Meeting on Microwaves, pp159-161, Aug., 2004, China.
  45. J.-H. Hong, Y.-C. Chen, M.-K. Chen, and M.-C. Wang, “Low Voltage Swing Bus Driver with Charge Recycling Technique,” in Proc. 13th VLSI Design/CAD Symp., pp. 117-120, Aug., 2002, Taiwan.

 

[Semiconductor Process, Device and Reliability]

  1. Yu-Ting Chow, Pei-Cheng Jiang, Chung-Tzu Chang, Mei-Yuan Zheng, Chin-An Wang, Mu-Chun Wang, Cheng-Hsun-Tony Chang*, Chii-Ruey Lin, and Chia-Fu Chen, “Competition between surface oxidation and carbon synthesis in low-temperature synthesized diamond-like thin films,” MRM2023/ IUMRS-ICA2023, Dec. 11-16, 2023, Kyoto, Japan. (https://mrm2023.jmru.org/about#about)
  2. 鄭美媛、沈添賜、郭瑨銨、何沅錚、鍾子文、王木俊*, “28 nm節點I/O HK/MG nMOSFETs在不同溫度DPN製程處理下之基底偏壓效應”, 2023工程科技術應用研討會, 12月01日2023年,新竹,台灣. (Chinese conference)
  3. 鄭美媛、何沅錚、汪晏詮、鍾子文、王木俊*, “不同氮濃度DPN製程處理下28 nm節點I/O HK/MG nMOSFETs之基底偏壓效應”, 2023工程科技術應用研討會, 12月01日2023年,新竹,台灣. (Chinese conference)
  4. 鄭美媛、李凱翔、許雅筑、王木俊*, “基底偏壓效應探究28 nm節點I/O HK/MG nMOSFETs在不同退火溫度和氮濃度DPN製程處理下之電特性”, 2023工程科技術應用研討會, 12月01日2023年,新竹,台灣. (Chinese conference)
  5. Tsung-Min Yang, Ming-Chang Shih, Mu-Chun Wang, Ta-Yu Chen, Chia-Lung Hsu, Jung-Tai Chung, Chien-Jung Huang, Wen-How Lan*, “Study of Enlarged Field Enhancement Factor for Carbon Nanotubes on Millimeter Scaled Platform” 12th IEEE&13th ICSEVEN 2023, P20230813284121, Nov. 8-12, 2023, Bangkok, Thailand.
  6. Cheng-Hsun-Tony Chang, Jin-An Kuo, Mei-Yuan Zheng, Wen-How Lan, and Mu-Chun Wang*, “C-V Characteristics of Nano-node HK/MG nMOSFETs with LDD and SDE implantation,” 12th IEEE&13th ICSEVEN 2023, P20230717536653, Nov. 8-12, 2023, Bangkok, Thailand.
  7. Jin-An Kuo, Mei-Yuan Zheng, Wen-How Lan, and Mu-Chun Wang*, “Back-bias Effect of Nano-node HK/MG nMOSFETs under Different Nitrogen Concentration of DPN Process Treatment,” 12th IEEE&13th ICSEVEN 2023, P20230717179337, Nov. 8-12, 2023, Bangkok, Thailand.
  8. Shou-Yen Chao, Ming-Han Wang, Mei-Yuan Zheng, Jin-An Kuo, Wen-How Lan, Yuan-Jheng He, and Mu-Chun Wang*, “Substrate Bias Effect of 28 nm-node HK/MG nMOSFETs with DPN Temperature Treatments,” IEEE WiPDA-Asia 2023, PID:230019, Aug. 27-29, 2023, Hsinchu, Taiwan.
  9. Yu-Chun Lin; Shou-Yen Chao; Ping-Chen Chou; Kuang-Wen Cheng; Zi-Wen Zhon; Wen-How Lan; Mu-Chun Wang*, “Amplification Gain of Nano-node Channel-width nMOSFETs with Thermal Annealing Treatments of DPN Processes,” 3rd IEEE International Conference on Electronic Communications, Internet of Things and Big Data 2023 (IEEE ICEIB 2023), PID: B230012, Apr. 14-16, 2023, Taichung, Taiwan.
  10. Jia-You Xu; Tien-Szu Shen; Wei-Lun Chu; Zhi-Kai Chen; Hao-Lun Hu; Ming-Han Wang; Mu-Chun Wang*, “Gain Efficiency of 28 nm-node Various Channel-width pMOSFETs under Nitrogen Concentration of DPN Treatment,” 3rd IEEE International Conference on Electronic Communications, Internet of Things and Big Data 2023 (IEEE ICEIB 2023), PID: B230013, Apr. 14-16, 2023, Taichung, Taiwan.
  11. Jian-Guo Huang; Cheng-Hsun-Tony Chang; Ming-Han Wang; Guo-Xuan Qiu; Mei-Yuan Zheng; Mu-Chun Wang*, “Dit Extraction of Nano-node HK/MG nMOSFETs Treated with DPN Process under Diverse Nitrogen Concentration,” 3rd IEEE International Conference on Electronic Communications, Internet of Things and Big Data 2023 (IEEE ICEIB 2023), PID: B230115, Apr. 14-16, 2023, Taichung, Taiwan. (Best Conference Paper Award)
  12. Yong-Yu Chen, Ming-Chang Shih, Kara Hsu, Mu-Chun Wang, Hsin-Hui Kuo, David Jui-Yang Feng, Chien-Jung Huang, Wen-How Lan*, “Degradation Study of RhB with Ag3PO4-Na2SiO3 under Visible Light,” 11th IEEE & 12th ICSEVEN 2023, PID: P20230215158689, Apr. 12-16, 2023, Osaka, Japan.
  13. Yueh-Ting Tsou, Jia-You Xu, Wen-Ying Hsieh, Zen-Yu Lai, Hao-Lun Hu, and Mu-Chun Wang*, “Voltage Gain of 28nm-node Various Channel-width pMOSFETs under Thermal Annealing Treatments of DPN Processes,” 10th IEEE & 11th ICSEVEN 2022, PID: O20221125810954, Jan. 11-15, 2023, Hanoi, Vietnam. (Oral best paper award)
  14. Cheng-Hsun-Tony Chang, Yu-Chun Lin, Yu-Chen Kuo, Zu-En Chou, Zi-Wen Zhon, Wen-How Lan, and Mu-Chun Wang*, “Gain Performance of Nano-node Channel-width nMOSFETs Treated by DPN Processes with Various Nitrogen Concentrations,” 10th IEEE & 11th ICSEVEN 2022, PID: P20221125135242, Jan. 11-15, 2023, Hanoi, Vietnam.
  15. 田士瑋、彭唯軒、蔡逸馨、唐子媛、鍾子文、王木俊*, “奈米HK/MG nMOSFET元件在不同氮化退火溫度與高/低汲極電場下之通道調變效應”, 2022工程科技術應用研討會, 12月02日2022年,新竹,台灣. (Chinese conference)
  16. Wei-Lin Su, Mu-Chun Wang, Hsin-Hui Kuo, David Jui-Yang Feng, Chien-Jung Huang, Wen-How Lan, “A Model for the Frequency Dispersion of p-type Si/Ga2O3 Capacitance and Conductance in Accumulation,” 10th IEEE & 11th ICSEVEN 2022, PID: P20220916167818, Nov. 9-13, Hanoi, Vietnam.
  17. Yueh-Ting Tsou, Tsai-Sheng Cheng, Wen-Ying Hsieh, Zi-Wen Zhon, Wen-How Lan*, and Mu-Chun Wang*, “λ-factor of Nano-node HK/MG nMOSFETs with DPN Different Annealing Temperatures,” IEDMS2022, PID:5210, Oct. 27-28, 2022, Nantou, Taiwan.
  18. Yu-Chun Lin, Zi-Wen Zhong, Cheng-Hsun-Tony Chang, Shou-Kong Fan, Mu-Chun Wang*, “Electrical Performance of 28nm-node Long/Short Channel-width nMOSFETs under DPN Nitridation Treatment,” 9th IEEE & 10th ICSEVEN 2022, PID: P20220520460521, June 23-26, Yilan, Taiwan.
  19. Jia-You Xu, Hao-Lun Hu, Chun-Yeon Lin, Wen-How Lan, Mu-Chun Wang*, “Electrical Characteristics of 28nm-node Small p-channel MOSFETs with High-k/Metal Gate Processes,” 9th IEEE & 10th ICSEVEN 2022, PID: P20220520109005, June 23-26, Yilan, Taiwan.
  20. Wei-Cheng Lu, Ming-Chang Shih, David Jui-Yang Feng, Hsin-Hui Kuo, Wei-Lin Su, Mu-Chun Wang, Chien-Jung Huang, Wen-How Lan*, “Reduction Study of MB with Ag3PO4/Na2SiO3,” 9th IEEE & 10th ICSEVEN 2022, PID: P20220508814723, June 23-26, Yilan, Taiwan.
  21. 陳冠穎、吳政霖、吳怡燁、王明翰、王木俊*, “奈米製程之DIBL效應量測技術探討”  2022第十八屆全國電子設計創意競賽暨學術研討會, PID: A009, 3月26日2022年,高雄,台灣. (Chinese conference)
  22. 陳志龍、黃聖淮、蔡旻翰、王明翰、王木俊*, “奈米nMOSFET中閘級電場對通道等效遷移率之影響”  2022第十八屆全國電子設計創意競賽暨學術研討會, PID: A011, 3月26日2022年,高雄,台灣. (Best conference paper award) (Chinese conference)
  23. 黃建國、鍾子文、胡皓倫、王明翰、王木俊*, “奈米等級nMOSFETs與nFinFETs之DIBL效應比較與探討”  2022第十八屆全國電子設計創意競賽暨學術研討會, PID: A013, 3月26日2022年,高雄,台灣. (Chinese conference)
  24. 陳在泩、沈添賜、張智傑、王木俊*, “28奈米HK/MG製程在不同氮化退火溫度下I/O nMOSFET閘極氧化層品質均勻性分析”2021工程科技術應用研討會, 12月17日2021年,新竹,台灣. (Chinese conference)
  25. Wan-Chun Yang, David Jui-Yang Feng, Hsin-Hui Kuo, Hui-Jun Hong, Wen-How Lan, Mu-Chun Wang, Chien-Jung Huang, “Anneal Effect of Bi2MoO6/SnOx:N to the Degradation of RhB under Visible Light Irradiation” 8th IEEE & 9th The International Conference on Science, Education and Viable Engineering (8th IEEE ICSEVEN 2021), Oct. 28-31, Taitung, Taiwan.
  26. Mu-Chun Wang*, Cheng-Hsun-Tony Chang, Hao-Lun Hu, Zi-Wen Zhong, Guo-Xuan Qiu, Wen-How Lan*, “Channel Surface Integrity with 2.4nm High-k Gate Dielectric under DPN Treatment at Different Annealing Temperatures,” 9th IEEE International Symposium on Next-Generation Electronics (ISNE 2021), July10-11, Changsha, China.
  27. 卓永興、張永義、王彥翔、朱偉綸、王木俊*, “以轉導觀點探究3D nMESFET與III-V 3D nMOSFET之優劣”  2021第十七屆全國電子設計創意競賽暨學術研討會, PID: A08, 4月10日2021年,高雄,台灣. (Chinese conference)
  28. 葉佳衡、吳得瑋、朱偉綸、王木俊*, “奈米SOI n-型鰭式電晶體在閘極電場偏壓下之爾利效應修正”  2021第十七屆全國電子設計創意競賽暨學術研討會, PID: A13, 4月10日2021年,高雄,台灣. (Chinese conference)
  29. Chien-Yu Lai, Yu-Ting Hsu, Wen-How Lan*, Kai-Feng Huang, Shao-Yi Lee, Kuo-Jen Chang, Mu-Chun Wang*, Chien-Jung Huang, “Effect of Bismuth Content in Precursor on the Structural and Optical Properties of Bismuth Molybdenum Oxide Film Prepared by Spray Pyrolysis,” 7th IEEE ICSEVEN 2020, PID: P20200920755208, Nov. 5-8, Penhu, Taiwan.
  30. Tzu-Chieh Chen, Wen-How Lan*, Wan-Chun Yang, Chun-An Chen, Ming-Chang Shih, David Jui-Yang Feng, and Mu-Chun Wang, “Electrical Characterization of Si/ZnO:Er,Yb Diode on NH4F/AgNO3 Aqueous Solution Processed Si Substrate,” 2020 International Electron Devices & Materials Symposium (IEDMS 2020), PID: PO3-5, Oct. 15-16, Taoyuan City, Taiwan.
  31. Shou-Yen Chao, Ji-Min Zhang, Wei-Lun Chu, Jian-Ming Chen, Cheng-Hsun-Tony Chang, Chii‐Wen Chen, and Mu-Chun Wang*, “Leakage of High-k Gate Dielectric of nMOSFETs with DPN Treatment under Various Nitrogen Concentrations,” 2020 International Electron Devices & Materials Symposium (IEDMS 2020), PID: PO5-1, Oct. 15-16, Taoyuan City, Taiwan.
  32. Pei-Cheng Jiang, Yu-Ting Chow, Chi-Wei Chien, Cheng-Hsun-Tony Chang*, Chiean-Kuo Chang, Tien-Szu Shen, Bing Mau Chen, Shou-Yen Chao, Mu-Chun Wang, Chii-Ruey Lin, “Silane-free procedure for SiO2 layer formation at room temperature,” 2020 International Electron Devices & Materials Symposium (IEDMS 2020), PID: PO7-14, Oct. 15-16, Taoyuan City, Taiwan.
  33. De-Cheng Zhang, Ching-Chuan Chou, Ho-Hsiang Chen, Shang-Ze Chen, Jian-Ming Chen, Hui-Yun Bor, Wen-How Lan, Mu-Chun Wang*, “Fringe Gate Leakage of 28nm HK/MG nMOSFETs with Nitridation Treatments,” 3rd IEEE International Conference on Knowledge Innovation and Invention 2020 (IEEE ICKII 2020), August 21-23, 2020, Kaohsiung, Taiwan.
  34. Si-Ping Li, Jia-Wei Xu, Wei-Hao Li, Jian-Ming Chen, Chao-Nan Wei, Wen-How Lan, Mu-Chun Wang*, “Patterns of Exposing Integrity of 28nm-node High-k Gate Dielectric on p-substrate with Nitridation Treatments,” 3rd IEEE International Conference on Knowledge Innovation and Invention 2020 (IEEE ICKII 2020), August 21-23, 2020, Kaohsiung, Taiwan.
  35. Ying-Jun Deng, Hao-Lun Hu, Yu-Han Liang, Jian-Ming Chen, Ching-Chuan Chou, Shea-Jue Wang, Mu-Chun Wang*, “Q-factor Integrity of 28nm-node High-k Gate Dielectric,” 3rd IEEE International Conference on Knowledge Innovation and Invention 2020 (IEEE ICKII 2020), August 21-23, 2020, Kaohsiung, Taiwan.
  36. Yu-Chen Lin, Kai-Chun Zhan, Ji-Min Zhang, Jian-Ming Chen, Cheng-Hsun-Tony Chang, Shea-Jue Wang, Mu-Chun Wang*, “Junction Integrity for 28nm High-k nMOSFETs with Thermal Stress,” 3rd IEEE International Conference on Knowledge Innovation and Invention 2020 (IEEE ICKII 2020), August 21-23, 2020, Kaohsiung, Taiwan.
  37. Ching-Chuan Chou, Jia-Wei Xu, Cheng-Zh Song, Hong-Yi Lin, Jian-Ming Chen, Cheng-Hsun-Tony Chang, Chii‐Wen Chen, Mu-Chun Wang*, “ON/OFF Current of Nano-node Field-Effect Transistors on p-substrate or SOI Substrate,” 2020 4th International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2020), PID: A1006, July 20-22, 2020, Seoul, Korea.
  38. Mu-Chun Wang*, Yi-Chun Shen, Tien-Szu Shen, Cheng-Hsun-Tony Chang, Shea-Jue Wang, Wen-How Lan, “Integrity of N-type Channel Surface for Nano-node High-k Gate Dielectric,” 2020 4th International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2020), PID: A008, 20-22, July, 2020, Seoul, Korea.
  39. Chun-An Chen, Yu-Ting Hsu, Wen-How Lan, Kai-Feng Huang, Kuo-Jen Chang, Mu-Chun Wang, Chien-Jung Huang, “Electrical Study of Er and N codoped Zinc Oxide Diode,” IEEE 2019 The International Conference on Science, Education and Viable Engineering (5th ICSEVEN 2019), Oct. 13-17, Yinchuan, Ningxia, China.
  40. Jian-Ming Chen, Mu-Chun Wang*, Shea-Jue Wang, Yi-Han Lou, Wen-How Lan, “Uniformity of Gate Dielectric for Core HK/MG pMOSFET with Nitridation Treatments,” IEDMS2019, PID:1037, Oct. 24-25, 2019, Taoyuan, Taiwan.
  41. Mu-Chun Wang*, Jian-Ming Chen, Shea-Jue Wang, Chih-Chieh Chang, Yi-Han Lou, Wen-How Lan, “Gate Dielectric Distribution of I/O HK/MG pMOSFET with Nitridation Treatments,” IEDMS2019, PID:1042, Oct. 24-25, 2019, Taoyuan, Taiwan.
  42. Chih-Chieh Chang, Chih-Cheng Lu, Mu-Chun Wang*, Heng-Sheng Huang, Shuang-Yuan Chen, and Shea-Jue Wang, “Nano-node n-type Gate Dielectric Integrity and Uniformity Correlated to Nitridation Process,” IEEE ISNE2019, Oct.09-10, 2019, Zhengzhou, China.
  43. Jian-Ming Chen, Chi-Hao Lo, Mu-Chun Wang*, Tien-Szu Shen, Ching-Chuan Chou, Wen-Shiang Liao, Wen-How Lan, “Comparison of Degradation and Recovery of SiONx and Hf-based Dielectric under Electrical-field Stress,” International Congress on Advanced Materials Sciences and Engineering 2019 (ICAMSE2019), July 22-24, Osaka, Japan.
  44. Mu-Chun Wang*, Tien-Szu Shen, Hui-Yun Bor, Chao‐Nan Wei, Wen‐Shiang Liao and Wen-How Lan, “Punch-through and DIBL Effects Exposing Nano-node SOI FinFETs under Heat Stress,” IEEE 26th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA2019), PID:330, July 02-05, Hangzhou, China.
  45. Hsiang-Ming Haung, Yu-Ting Hsu, Wen-How Lan*, Kai-Feng Huang, Kuo-Jen Chang, Jia-Ching Lin, Wen-Jen Lin , Shao-Yi Lee, Mu-Chun Wang, “Photoluminescence Study of Er doped Zinc Oxide Prepared by Spray Pyrolysis with Zinc Formate Precursor,” IEEE 2019 The International Conference on Science, Education and Viable Engineering (4th ICSEVEN 2019), Apr. 6-10, Ho Chi Minh, Vietnam.
  46. Yau-Lung Tasi, Wen-How Lan*, Kuo-Jen Chang, Jia-Ching Lin, Wen-Jen Lin, Shao-Yi Lee, Mu-Chun Wang, Chien-Jung Huang, “Study of State Energies in InAs/GaSb Superlattice with InSb Interlayer,” IEEE 2019 The International Conference on Science, Education and Viable Engineering (4th ICSEVEN 2019), Apr. 6-10, Ho Chi Minh, Vietnam.
  47. Tien-Szu Shen, Jian-Ming Chen, De-Cheng Zhang, Chun-Chieh Yang, Wen-Shiang Liao, Chi-Hao Lo, Wen-How Lan, Mu-Chun Wang*, “DIBL Effect for Nano-node p-type FinFETs under Thermal Stress,” 2018 International Electron Devices & Materials Symposium (IEDMS 2018), PID:158, Nov. 14-16, Keelung City, Taiwan.
  48. Ching-Chuan Chou, De-You Zeng1, Wei-En Gao, Cheng-Yi Fan, Wen-Shiang Liao, Zi-Jun Xie, Wen-How Lan, Mu-Chun Wang*, “Punch-through Effect for Nano-node n-type FinFETs under Thermal Stress and Vt Implant Energy,” 2018 International Electron Devices & Materials Symposium (IEDMS 2018), PID:155, Nov. 14-16, Keelung City, Taiwan.
  49. Zi-Jun Xie, Cheng-Hsun-Tony Chang, Min-Zge Tsai, Cheng-Hua Peng, Hao-Chen Xu, Wen-Shiang Liao, Wen-How Lan, Mu-Chun Wang*, “Abnormal Characteristics of Drive Current for n-type FinFETs under Normal Operation Field,” 2018 International Electron Devices & Materials Symposium (IEDMS 2018), PID:163, Nov. 14-16, Keelung City, Taiwan.
  50. Yu-Ting Hsu, Che-Chi Lee, Wen-How Lan, Kai-Feng Huang, Kuo-Jen Chang, Jia-Ching Lin, Shao-Yi Lee, Wen-Jen Lin , Mu-Chun Wang, Chien-Jung Huang, “Thickness Study of Er-doped Magnesium Zinc Oxide Diode,” IEEE/ 3rd 2018 The International Conference on Science, Engineering, Vocational Education and Novelty (3rd ICSEVEN 2018), Henan, China on Nov. 3-7, 2018.
  51. Hsiang-Ming Huang, Yu-Ting Hsu, Wen-How Lan, Kai-Feng Huang, Kuo-Jen Chang, Jia-Ching Lin, Wen-Jen Lin, Mu-Chun Wang, Cheng-Fu Yang, “Conductivity Study of Er doped Zinc Oxide by Spray Pyrolysis with Zinc Formate Precursor,” 2018 International Conference on Innovation, Communication and Engineering (ICICE 2018), Nov. 9-14, 2018, Hangzhou, China.
  52. Tsung-Mao Hsieh, Cheng-You Liu, Hsiang-Ming Huang, Che-Chi Lee, Wen-How Lan, Mu-Chun Wang, Jia-Ching Lin, Kuo-Jen Chang, Wen-Jen Lin, “Anneal effect of Er doped zinc oxide by spray pyrolysis,” IEEE ISNE 2018, PID: 8098 (P1-12), May 2018, Taipei, Taiwan.
  53. Chih-Chieh Chang, Mu-Chun Wang*, Shun-Ping Sung, Heng-Sheng Huang, Heng-Sheng Huang, Shuang-Yuan Chen, Shea-Jue Wang, “Observation of Degradation and Recovery of Stacked HfOx/ZrOy/HfOx MOSFETs,” IEEE ISNE 2018, PID:8040 (P1-05), May 2018, Taipei, Taiwan.
  54. Yan-Ting Chen, Mu-Chun Wang*, Ko-Chin Hsu, Heng-Sheng Huang, Shuang-Yuan Chen, Shea-Jue Wang, “Off-state Current Behaviors of 28nm-node nMOSFETs under Negative Gate Bias,” IEEE ISNE 2018, PID:8016 (P1-24), May 2018, Taipei, Taiwan.
  55. Heng-Sheng Huang, Ping-Ray Huang, Shuang-Yuan Chen, Shea-Jue Wang, Mu-Chun Wang*, LS Huang, Wei-Lun Wang, “The μeq Fitting for Mixed Current Model of MOSFETs Considering Horizontal Electric Field,” IEEE ISNE 2018, PID:8026 (P1-25), May 2018, Taipei, Taiwan.
  56. Shih-Fan Chen, Shea-Jue Wang*, Yu-Hsiang Li, Zheng-An Zhu, Xiao-Ting Hong, Jin-Hui Hu, Mu-Chun Wang*, “Electrical Characteristics of WO3/Ag/WO3 Sandwich Structure Fabricated with Magnetic-control Sputtering Metrology,” IEEE ISNE 2018, PID: 8148 (S14-1), May 2018, Taipei, Taiwan.
  57. Zhiming Wang, Ching-Chuan Chou, Wei-Cheng Wang, Tien-Szu Shen, Ting-Wei Chao, Zi-Jun Xie, Wen-Shiang Liao, Mu-Chun Wang*, “Drive Current Behaviors of Multi N-channel FinFETs under Different VT Implant Energies,” IEEE ISNE 2018, PID: 8049 (P1-01), May 2018, Taipei, Taiwan.
  58. Ting-Wei Chao, Tien-Szu Shen, Chii-Ruey Lin, Ching-Chuan Chou, Chia-Hsien Chang, Wen-Shiang Liao, Wen-How Lan, Mu-Chun Wang*, “GIDL Effect Observed in FinFET Shapes and VT Implant Energy,” IEEE ISNE 2018, PID:8107 (P1-04), May 2018, Taipei, Taiwan.
  59. Wen-Yang Huang, Tsai-Sheng Cheng, Ming-Jin Hong, Wen-Shiang Liao, Chi-Hao Lo, Wen-How Lan, Mu-Chun Wang*, “Off-state Drain Current Characteristics of p-type Multi-channel FinFETs Impacted with Different Vt Implantation Energy,” IEEE ISNE 2018, PID:8031(S2-4), May 2018, Taipei, Taiwan.
  60. Mu-Chun Wang, Wen-Yang Huang, Chong-An Dai, Wen-Shiang Liao, Chi-Hao Lo, Shea-Jue Wang, Wen‐How Lan, “Plasma Implant Causing DIBL Variation in p-channel FinFETs with Single or Multi-fin Shape on SOI Wafer,” APSPT-10, PID: B-009, Dec. 2017, Taoyuan, Taiwan.
  61. Mu-Chun Wang, Ting‐Wei Chao, Chong-An Dai, Wen-Shiang Liao, Zi-Jun Xie, Shea-Jue Wang, Wen‐How Lan, “VT Ion Implant Inducing DIBL Variance in n-channel FinFETs on SOI Substrate,” APSPT-10, PID: B-010, Dec. 2017, Taoyuan, Taiwan.
  62. Yi-Fu Lu, Wen-How Lan* , Mu-Chun Wang*, Ming-Chang Shih, Wen-Jen Lin, Jia-Ching Lin, Shao-Yi Lee, Kuo-Jen Chang, Chien-Jung Huang, “Resistance Study of Er doped Zinc Oxide Diode by Spray Pyrolysis,” 2017 The International Conference on Science, Engineering, Vocational Education and Novelty (ICSEVEN 2017), PID: P20170816110901, Oct. 2017, Guangxi, China.
  63. Yi-Fu Lu, Wen-How Lan*, Ming-Chang Shih, Hsin-Hui Kuo, David Jui-Yang Feng, Yi-Jen Chiu, Yung-Jr Hung, Mu-Chun Wang*, Cheng-Fu Yang, “Photocatalytic Study of Calcium Zinc Oxide with Different Calcium Content,” 2017 International Conference on Innovation, Communication and Engineering (ICICE 2017), Nov. 2017, Kunming, Yunnan Province, P. R. China.
  64. Mu-Chun Wang, Shun-Ping Sung, Shea-Jue Wang, Heng-Sheng Huang, Chao-Nan Wei, Chih-Chieh Chang, Shuang-Yuan Chen, “Degradation and Recovery of HfZrO2 Dielectric under Voltage Stresss,” International Electron Devices and Materials Symposium 2017 (IEDMS 2017), PID: 1111, Sept. 2017, Hsinchu, Taiwan.
  65. Ping-Ray Huang, Heng-Sheng Huang1, Mu-Chun Wang, Shuang-Yuan Chen, Shea-Jue Wang, Win-Der Lee, “I‐V Model for Nano‐MOSFETs by Considering Diffusion Current,” International Electron Devices and Materials Symposium 2017 (IEDMS 2017), PID: 1121, Sept. 2017, Hsinchu, Taiwan.
  66. Mu-Chun Wang, Zih-Yang Rao, Chii‐Wen Chen, Wen-Shiang Liao, Hui-Yun Bor, Zi-Jun Xie, Shea-Jue Wang, Wen-How Lan, “Corner Gate Leakage of n‐channel FinFETs under Heating Effect,” International Electron Devices and Materials Symposium 2017 (IEDMS 2017), PID: 1124, Sept. 2017, Hsinchu, Taiwan.
  67. 饒子揚、鄧永志、李明峻、王木俊, “n型奈米鰭式電晶體在汲極加壓後之元件劣化探討” 2017電子,信號,與通訊創新科技研討會, 國立高雄應用科技大學,高雄, 5月 2017.(Chinese version)
  68. 饒子揚、沈宏謦、王木俊, “n型奈米鰭式電晶體閘極電流密度分佈探討” 2017電子,信號,與通訊創新科技研討會, 國立高雄應用科技大學,高雄, 5月 2017. (Chinese version)
  69. 黃文敭、張耀文、趙廷唯、王木俊, “溫度調變下不同p通道鰭式電晶體之DIBL變化” 2017電子,信號,與通訊創新科技研討會, 國立高雄應用科技大學,高雄, 5月 2017. (Chinese version, Excellent Award Paper)
  70. 趙廷唯、古俊烽、黃文敭、王木俊, “n通道鰭式電晶體在溫度不同之汲極引起的能障下降變化” 2017電子,信號,與通訊創新科技研討會, 國立高雄應用科技大學,高雄, 5月 2017. (Chinese version)
  71. Mu‐Chun Wang, Zih‐Yang Rao, Hao‐Yi Liu, Fu‐Yuan Tuan, Wen‐Shiang Liao and Wen‐How Lan, “DIBL Effect Gauging the Integrity of Nano‐node n‐channel FinFETs,” IEEE ISNE 2017, PID:12, May 2017, Keelung, Taiwan.
  72. Mu‐Chun Wang, Ting‐Wei Chao, Chao‐Yen Chen, Fu‐Yuan Tuan, Yu‐Jung Liao and Shea‐Jue Wang, “VT Implant Energy Impacting DIBL and Punch‐through Effects of Nano‐node n‐channel FinFETs on SOI Wafers,” IEEE ISNE 2017, PID:13, May 2017, Keelung, Taiwan.
  73. Mu‐Chun Wang, Ko‐Chin Hsu, Jin‐Wei Guo, Heng‐Sheng Huang, Shuang‐Yuan Chen and Shea‐Jue Wang, “Decoupled Tunneling and GIDL Effects for 28nm High‐k Stacked nMOSFETs,” IEEE ISNE 2017, PID:15, May 2017, Keelung, Taiwan.
  74. Che‐Chi Lee, Jeng‐Lung Chen, Wen‐How Lan and Mu‐Chun Wang, “Deposition Temperature Study of Nitrogen‐doped Zinc Oxide by Spray Pyrolysis,” IEEE ISNE 2017, PID:17, May 2017, Keelung, Taiwan.
  75. Fu‐Yuan Tuan, Shun‐Ping Sung, Hong‐Jie Chen, Shea‐Jue Wang, Heng‐Sheng Huang and Mu‐Chun Wang, “Electrical Stress Probing Recovery Efficiency of 28nm HK/MG nMOSFETs under Different Nitrogen Concentration in Nitridation,” IEEE ISNE 2017, PID:23, May 2017, Keelung, Taiwan.
  76. Fu‐Yuan Tuan, Shun‐Ping Sung, Tzu‐Hao Hsieh, Ching‐Tang Chang, Shuang‐Yuan Chen and Mu‐Chun Wang, “Voltage Stress Exposing Degradation Rate of 28nm HK/MG nMOSFETs under Different Nitridation Annealing Temperatures,” IEEE ISNE 2017, PID:25, May 2017, Keelung, Taiwan.
  77. Zih‐Yang Rao, Mu‐Chun Wang, Jun‐Wen Cai, Fu‐Yuan Tuan, Wen‐Shiang Liao and Wen‐How Lan, “Isolation Integrity of Drain/Gate Contact Exposed with Source/Drain Extension Length for SOI p‐channel FinFETs,” IEEE ISNE 2017, PID:28, May 2017, Keelung, Taiwan.
  78. Wei‐Lun Wang, Heng‐Sheng Huang, Yu‐Hao Chao, Shuang‐Yuan Chen, Shea‐Jue Wang, Fu‐Yuan Duan and Mu‐Chun Wang, “I‐V Model of Nano nMOSFETs Incorporating Drift and Diffusion Current,” IEEE ISNE 2017, PID:31, May 2017, Keelung, Taiwan.
  79. Mu‐Chun Wang, Wen‐Yang Huang, Jia‐Hong Lin, Fu‐Yuan Tuan, Yu‐Tsung Liao and Wen‐How Lan, “The DIBL Effect of SOI p‐channel FinFETs under Various SDE Lengths,” IEEE ISNE 2017, PID:36, May 2017, Keelung, Taiwan.
  80. 饒子揚、徐振威、鄧永志、段復元、王木俊, “GIDL效應驗證微影偏移於奈米SOI n通道FinFET,” 2017第十五屆微電子技術發展與應用研討會, PID: A5, 高雄, 5月 2017. (Chinese version)
  81. 王木俊、趙廷唯、劉昌昇、連佳弘、饒子揚、段復元, “長源/汲極延伸長度與不同VT離子佈植能量下在SOI n通道FinFETs中之DIBL與次臨界擺幅效應,” 2017第十五屆微電子技術發展與應用研討會, PID: A12, 高雄, 5月 2017. (Chinese version)
  82. 王木俊、黃文敭、劉婉萱、趙廷唯、饒子揚、段復元, “不同源/汲極延伸長度在SOI n通道FinFETs中之DIBL與貫穿效應,” 2017第十五屆微電子技術發展與應用研討會, PID: A17, 高雄, 5月 2017. (Chinese version)
  83. Wei-Hsuan Hsu, Mu-Chun Wang, Ming-Chang Shih, Cheng-Lung Chen, Che-Chi Lee, Wen-Jen Lin, Shao-Yi Lee, Jia-Ching Lin, Kuo-Jen Chang, Tzu-Hsiang Lin, Yi-Fu Lu, Yu-Xuan Ding, Sheng-Chung Huang, Chien-Jung Huang, Wen-How Lan, “Conductivity Study of MgZnO/ZnO Heterostructure,” Optics & Photonics Taiwan International Conference (OPTIC 2016), Taipei, Taiwan, Dec. 03-05, 2016.
  84. 黃峻俞, 楊政達, 彭晟書, 陳適範, 王錫九, 王木俊, 林於隆,“氮氣流量對非晶氮化鉭應用於擴散阻絕層與擴散係數之影響研究,”105年中國材料科學學會年, PID:221, 11月, 2016年,新竹, 台灣. (Chinese version)
  85. Shun‐Ping Sung, Mu-Chun Wang, Heng Sheng Huang, Shuang-Yuan Chen , Cheng‐Wei Bai, Shea Jue Wang, Win‐Der Lee, “Substrate Current Characteristics for 28 nm HK/MG NMOSFETs under HC Stresses,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1033 (PC-6), Nov. 2016, Taipei, Taiwan.
  86. Ching‐Tang Chang, Heng Sheng Huang , Win‐Der Lee , Shuang Yuan Chen, Hau‐Kei Hsu, Mu-Chun Wang, Shea-Jue Wang, “Hot‐Carrier Induced Degradation and Its Recovery in HK/MG NMOSFETs,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1034 (PC-7), Nov. 2016, Taipei, Taiwan.
  87. Ko‐Chin Hsu, Fu‐Yuan Tuan, Mu‐Chun Wang, Shea Jue Wang, Heng-Sheng Huang, Shuang-Yuan Chen, Win‐Der Lee, Chia‐Yu Tsai, “Feasible Programming Methods for 28nm‐node nMOSFETs,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1042 (PC-8), Nov. 2016, Taipei, Taiwan.
  88. Wei‐Lun Wang, Heng-Sheng Huang, Win‐Der Lee, Shuang-Yuan Chen, Yu‐Hao Travis Chao, Mu-Chun Wang, Shea-Jue Wang, “A New Model Explaining the Saturation Current of Nano‐MOSFETs,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1049 (PD-10), Nov. 2016, Taipei, Taiwan.
  89. Mu-Chun Wang, Zih‐Yang Rao, You‐Sheng You, Wen‐Shiang Liao, Jhen‐Wei Tien, Shea-Jue Wang, Wen‐How Lan, “CLM Effect of Nano p‐channel FinFETs Depending on VT Implant Energies,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1053 (PC-13), Nov. 2016, Taipei, Taiwan.
  90. Wen‐Shiang Liao, Zih‐Yang Rao, You‐Sheng You, Mu-Chun Wang, Yu‐Wei Wang, Shea-Jue Wang, Wen‐How Lan, “Effective Surface Channel‐length Effect of Nano‐scale n‐channel FinFETs Integrated with VT Doping Energies,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1056 (PC-14), Nov. 2016, Taipei, Taiwan.
  91. Mu-Chun Wang, Wen‐Yang Huang, Hsu‐Hsin Fu, Chao‐Nan Wei, Jhen‐Wei Tien, Shea Jue Wang, Wen‐How Lan, “Early Effect of Nano p‐channel FinFETs Biased at Middle Gate Field,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1063 (PD-13), Nov. 2016, Taipei, Taiwan.
  92. Mu-Chun Wang, Wen‐Yang Huang, Jia‐Houng Huang, Wen‐Shiang Liao, Yu‐Wei Wang, Shea Jue Wang, Wen‐How Lan, “Middle Gate Bias Exposing CLM Effect of Nano n‐channel FinFETs,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1064 (PC-16), Nov. 2016, Taipei, Taiwan.
  93. Chii‐Wen Chen, Ting-Wei Chao, Chen‐Wei Zhang, Hui‐Yun Bor, Mu-Chun Wang, Jhen‐Wei Tien, Wen‐How Lan, “Heat Stress Impacting Early Effect of Nano p‐channel FinFETs at High Gate Field,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1066 (PC-17), Nov. 2016, Taipei, Taiwan.
  94. Mu-Chun Wang, Ting-Wei Chao, Yun‐Ru Chen, Chao‐Nan Wei, Yu‐Wei Wang, Shea- Jue Wang, Wen‐How Lan, “Thermal Stress Exposing Surface Channel‐length Effect of Nano n-type FinFETs,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1067( PA-11), Nov. 2016, Taipei, Taiwan.
  95. Fu‐Yuan Tuan, Ko‐Chin Hsu, Shea-Jue Wang, Mu‐Chun Wang, Chia‐Yu Tsai, Heng-Sheng Huang, Shuang-Yuan Chen, Win‐Der Lee Hui‐Yun Bor, “The Program Mechanism with CHEI/DAHC on Nano HK/MG CMOS Logic Process,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1082 (PC-22), Nov. 2016, Taipei, Taiwan.
  96. Shea Jue Wang, Tzu‐Hsien Yang, Zheng‐Da Yang, Jun‐Yu Huang, Shih‐Fan Chen, Mu‐Chun Wang, Yu‐Long Lin, Hui‐Yun Bor, “Nitrogen Flow Rate Relating Diffusion Behaviors of Copper in TaN Layers,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1095 (PC-24), Nov. 2016, Taipei, Taiwan.
  97. Shea Jue Wang, Tzu‐Hsien Yang, Zheng‐Da Yang, Lin Chih Chan, Shih‐Fan Chen, Mu‐Chun Wang, Yu‐Long Lin, Chao‐Nan Wei, “Performance of TaN as Diffusion Barrier Layer under N2 Flow‐rate Control,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1096 (PC-25), Nov. 2016, Taipei, Taiwan.
  98. Ko-Chin Hsu, Mu-Chun Wang, Heng Sheng Huang, Zih‐Yang Rao, Shea Jue Wang , “Comparison of Nano-node n-channel FinFETs and 28nm HK/MG nMOSFETs,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1137 (PD-26), Nov. 2016, Taipei, Taiwan.
  99. Zih-Yang Rao, Mu-Chun Wang, Wen-Shiang Liao, Ko-Chin Hsu, “Gate Leakage for Nano-node nMOSFETs and n-channel FinFETs,” International Electron Devices and Materials Symposium 2016 (IEDMS 2016), PID: 1204 (PD-39), Nov. 2016, Taipei, Taiwan.
  100. Tzu-Hsiang Lin, Ming-Chang Shih , David Jui-Yang Feng, Hsin-Hui Kuo, Yi-Jen Chiu, Yung-Jr Hung, Mu-Chun Wang , Chien-Jung Huang and Wen-How Lan, “Dark current reduction of n-ZnO/p-Si diode with Boron doped interlayer,” The 9th International Workshop on Zinc Oxide and Related Materials 2016 (IWZnO 2016), PID: TP14 (A-039), Oct. 2016, Taipei, Taiwan.
  101. Wen-How Lan, Ming-Chang Shih, David Jui-Yang Feng, Yu-Xuan Ding, Yi-Jen Chiu, Yung-Jr Hung, Wen-Jen Lin , Shao-Yi Lee, Jia-Ching Lin, Kuo-Jen Chang, Mu-Chun Wang, Chien-Jung Huang, “Photocatalytic Study of Zinc Oxide with Different Bismuth Doping,” The Fifth International Conference on Innovation, Communication and Engineering (ICICE 2016), PID: C160024, Xi'an, Shaanxi, P.R. China, Nov. 2016. (Best conference paper award)
  102. Ming-Chang Shih, David Jui-Yang Feng, Yu-Xuan Ding, Yi-Jen Chiu, Yung Hung, Wen-Jen Lin, Shao-Yi Lee, Jia-Ching Lin, Kuo-Jen Chang, Mu-Chun Wang, Chien-Jung Huang, Wen-How Lan, “Photocatalytic study of zinc oxide with different bismuth doping,” IEEE/ 2016 International Conference on Advanced Materials for Science and Engineering (ICAMSE2016), pp. 13-14, Nov. 2016.
  103. 王昱崴、游聖佑、張宸瑋、饒子揚、廖文翔、王木俊*, “不同n型鰭式電晶體之爾利電壓變化與多根鰭之相依性” 2016電子,信號,與通訊創新科技研討會, p.34, 國立高雄應用科技大學, 2016/5/27. (Chinese version)
  104. 田振威、李彥勳、徐信復、盧君翰、廖文翔、王木俊*, “不同通道之爾利效應在p型鰭式場效應電晶體” 2016電子,信號,與通訊創新科技研討會, p.35, 國立高雄應用科技大學, 2016/5/27. (Chinese version)
  105. 游一宏、黃佳鴻、陳韻如、廖文翔、王木俊*, “調變微影曝光能量參數對n型奈米鰭式電晶體之電性特性研究” 2016電子,信號,與通訊創新科技研討會, p.30, 國立高雄應用科技大學, 2016/5/27. (Chinese version)
  106. 饒子揚、王昱崴、田振威、陳啟文、廖文翔、王木俊*, “通道寬度調變對奈米多通道n型鰭式電晶體之電特性探究” 2016電子,信號,與通訊創新科技研討會, p.31, 國立高雄應用科技大學, 2016/5/27. (Chinese version)
  107. Mu-Chun Wang, Jhen-Wei Tien, Wen-Shiang Liao, Shea-Jue Wang, Chii-Wen Chen, Wen-How Lan, “Electrical Characteristics of p-type FinFETs with Different Source/Drain Extension Spacing,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 152 (D29), Nov. 2015, Tainan, Taiwan.
  108. Mu-Chun Wang, Jhen-Wei Tien, Wen-Shiang Liao, Shea-Jue Wang, Yu-Wei Wang, Chii-Wen Chen, Wen-How Lan, “Fringe-Gate Leakage Mechanisms under Various Source/Drain Extension Spacing for p-type FinFETs,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 243 (D30), Nov. 2015, Tainan, Taiwan.
  109. Mu-Chun Wang, Yu-Wei Wang, Wen-Shiang Liao, Shea-Jue Wang, Yi-Hong Yu, Chii-Wen Chen, Wen-How Lan, “A Derivative Metrology to Justify the Punch-Through Effect for n-type FinFETs,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 151 (D28), Nov. 2015, Tainan, Taiwan.
  110. Mu-Chun Wang, Yi-Hong Yu, Wen-Shiang Liao, Shea-Jue Wang, Zih-Yang Rao, Chun-Han Lu, Chii-Wen Chen, Wen-How Lan, “Early Effect for n-type FinFETs with Single-fin or Multi-fin Contour,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 155 (D44), Nov. 2015, Tainan, Taiwan.
  111. Cheng-Wei Bai, Heng-Sheng Huang, Shuang-Yuan Chen, Yi-Ming Li, Shea-Jue Wang, Win-Der Lee, Mu-Chun Wang, “Multiple Sweeping Drain-Bias Stress in 28 nm HK/MG nMOSFETs,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 146 (A23), Nov. 2015, Tainan, Taiwan. 
  112. Li-Fu-Yang, Heng-Sheng Huang, Shuang-Yuan Chen, Yi-Ming Li, Shea-Jue Wang, Win-Der Lee, Mu-Chun Wang, “The GCIP effect with High Drain-Bias Stress in 28 nm HK/MG nMOSFETs,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 147 (A31), Nov. 2015, Tainan, Taiwan. 
  113. Jia-Yu Cai, Fu-Yuan Tuan, Shea-Jue Wang, Heng-Sheng Huang, Shuang-Yuan Chen, Mu-Chun Wang, Win-Der Lee, Yi-Cheng Hsieh, “GCIP Characteristics of High-k Stack NMOSFETs,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 121 (A56), Nov. 2015, Tainan, Taiwan. 
  114. Yu-Hao Chao, Heng-Sheng Huang, Shuang-Yuan Chen, Jia-Siang Lan, Shea-Jue Wang, Win-Der Lee, Mu-Chun Wang, “Simulation to Expose and Control the RSCE Effect for 28nm HK/MG nMOSFETs,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 145 (A22), Nov. 2015, Tainan, Taiwan. 
  115. Hao-Kei Hsu, Heng-Sheng Huang, Win-Der Lee, Shuang-Yuan Chen, Kun-Yun Lian, Mu-Chun Wang, Shea-Jue Wang, “Recovery of Hot-carrier Induced Degradation in HK/MG PMOSFETs Treated by Different Nitridation Conditions,” International Electron Devices and Materials Symposium 2015 (IEDMS 2015), PID: 124 (A60), Nov. 2015, Tainan, Taiwan.
  116. Tzu-Yang Lin, Wen-How Lan, Chien-Jung Huang, Chun-Yi Lee, Wen-Jen Lin, Shao-Yi Lee, Jia-Ching LinKuo-Jen Chang, Mu-Chun Wang, Cheng-Fu Yang, “Visible Light Photocatalytic Study of Zinc Oxide Diode by Spray Pyrolysis,” 2015International Conference on Innovation, Communication and Engineering (ICICE 2015), PID: 1772, Oct. 2015, Hunan, China.
  117. Tzu-Yang Lin, Yu-Ting Hsu, Wen-How Lan, Wei-Hsuan Hsu, Chien-Jung Huang, Ming-Chang Shih, Mu-Chun Wang, Kai-Feng Huang, “Conductivity Study of Magnesium Zinc Oxide with Indium and Nitrogen co-doping by Spray Pyrolysis,” 2015International Conference on Innovation, Communication and Engineering (ICICE 2015), PID: 1769, Oct. 2015, Hunan, China.
  118. Mu-Chun Wang, Wei-Chun Chung, Yi-Hong Yu,Jhen-Wei Tien, Chii-Wen Chen, Wen-How Lan, “Reducing the Rework in the Photo-lithography Process of Wafer-bump Assembly with Quality Management”, IEEE/ IMPACT 2015, PID: TW106-1, July 2015, Taipei, Taiwan.
  119. Mu-Chun Wang, Wei-Chun Chung, Yi-Hong Yu,Yu-Wei Wang, Chii-Wen Chen, Wen-How Lan “CIP Metrology Improving the Bump Yield in Photo-lithography Process”, IEEE/ IMPACT 2015, PID: TW106-2, July 2015, Taipei, Taiwan.
  120. TzuYang Lin, WeiHsuan Hsu, ChunYi Lee, YuXuan Ding, ShengChung Huang, WenHow Lan, MuChun Wang, “Photocatalytic Study of Silver and Bismuth Codoped Zinc Oxide by Spray Pyrolysis,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2015), PID: 270164 (PW-07), May 2015, Taipei, Taiwan.
  121. Mu-Chun Wang, Jian-Liang Lin, De-Huang Jhuang, Wen-Shiang Liao, Yi-De Lai, Wen-How Lan, Shea-Jue Wang, “Electrical Performance of Dense and Isolated n-type FinFETs in Micro-loading Effect,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2015), PID: 270220 (PW-13), May 2015, Taipei, Taiwan.
  122. Mu-Chun Wang, Jian-Liang Lin, Shao-Syuan Syu, Wen-Shiang Liao, Wen-How Lan, Shea-Jue Wang, “Heating Stress Probing Electrical Performance of Multiple N-channel FinFETs with VT Doping Energies,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2015), PID: 270161 (PW-21), May 2015, Taipei, Taiwan.
  123. Mu-Chun Wang, Yi-De Lai, Shao-Syuan Syu, Wen-Shiang Liao, Wen-How Lan, Shea-Jue Wang, “Electrical Characteristics of Multi-gate P-channel FinFETs with VT Implanting Energies under Temperature Stress,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2015), PID: 270159 (PW-16), May 2015, Taipei, Taiwan.
  124. Yu-Ting Hsu, Tzu-Yang Lin, Wen-How Lan, Yu-Hsuan Huang, Huang-Ming Chang, Mu-Chun Wang, Cheng-Fu Yang, Kai-Feng Huang, “Photocatalytic Study of Bismuth Doped Zinc Oxide Prepared by Spray Pyrolysis:The effect of Annealing.” IEEE/ Optics & Photonics Taiwan, the International Conference (OPTIC), PID: 2014-Thu-P1001-P013, 4– 5 December 2014, Taichung, Taiwan.
  125. Yi-Hong Yu, Mu-Chun Wang*, Wen-Shiang Liao, Shang-Lin Tsai, Win-Der Lee, Chuan-Hsi Liu, “Photo Matrix Technology Overcoming the Constraint of Nano-node FinFETs,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1232, Nov. 2014, Hualien, Taiwan.
  126. Mu-Chun Wang*, Yi-De Lai, Wen-Shiang Liao, Cheng-Wei Cai,, Win-Der Lee, Piyas Samanta, “Temperature Stress Probing Performance of p-channel FinFETs under Different VT Implanting Energies,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1226, Nov. 2014, Hualien, Taiwan.
  127. Mu-Chun Wang*, Jian-Liang Lin, Wen-Shiang Liao, Jhao-Jhong Jiang, Win-Der Lee, Wen-How Lan, “Electrical Performance of n-channel FinFETs with Threshold-voltage Doping Energies under Heating Stress,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1321, Nov. 2014, Hualien, Taiwan.
  128. Jia-Siang Lan, Mu-Chun Wang*, Wen-Sheng Chen, Yu-Zheng Lin, Heng-Sheng Huang, Shuang-Yuan Chen, Shea-Jue Wang, LS Huang, “Characteristics and  Kink Effect under Temperature Stress for 28nm HK/MG nMOSFETs after Plasma Nitridation Treatments,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1246, Nov. 2014, Hualien, Taiwan.
  129. Yi-Ming Li, Mu-Chun Wang*, Wen-Sheng Chen, Heng-Sheng Huang, Shuang-Yuan Chen, Shea-Jue Wang, LS Huang, “Drain Field Exposing Hump Effect for 28nm HK/MG nMOSFETs under Plasma Nitridation Treatments,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1265, Nov. 2014, Hualien, Taiwan.
  130. Kun-Yun Lian*, Heng-Sheng Huang1, Shuang-Yuan Chen, Wei-Jhih Jian1, Shea-Jue Wang, Mu-Chun Wang, LS Huang , “The Gate Leakage of 28 nm MOSFETs by Different Processes of DPN Treatments,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1279, Nov. 2014, Hualien, Taiwan.
  131. Yi-Cheng Hsieh*, Shea-Jue Wang, Heng-Sheng Huang, Fu-Yuan Tuan, Shuang-Yuan Chen, Mu-Chun Wang, LS Huang , “Discussion of different Nitrogen Concentrations and Annealing Temperatures on GIDL Current Characteristics of High-k Stack PMOSFETs,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1279, Nov. 2014, Hualien, Taiwan.
  132. Y. L. Chen, H. W. Hsu, H. S. Huang, S. Y. Chen, M. C. Wang, and C. H. Liu, “Relationship between Stress Distribution and Hot‐Carrier Effect for Strained nMOSFETs,” International Electron Devices and Materials Symposium 2014 (IEDMS 2014), PID: 1144, Nov. 2014, Hualien, Taiwan.
  133. Mu-Chun Wang, Po-Kai Chen, Win-Der Lee, Yi-Hong Yu, Shea-Jue Wang, Fang Hsu, Osbert Cheng, LS Huang, “Early Effect Exposing Performance of 28nm HK/MG pMOSFETs under PDA or DPN Nitridation Treatment,” 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, PID: P0004 (P109), June 2014, Chengdu, China.
  134. Shea-Jue Wang, Chao-Wang Li, Win-Der Lee*, Kuan-Ho Chen , Osbert Cheng, LS Huang, Mu-Chun Wang*, “CLM Effect for 28nm Stacked HK NMOSFETs after DPN Treatment with Different Annealing Temperatures,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2014), PID: 240034 (Y5-18), May 2014, Taoyuan, Taiwan.
  135. Win-Der Lee, Jie Min Yang, Shea-Jue Wang *, Osbert Cheng, LS Huang, Mu-Chun Wang*, “Comparison of Gate Leakage for SiONx and HfZrOx Gate Dielectrics of MOSFETs with Decoupled Plasma Nitridation Process,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2014), PID: 240035 (Y5-13), May 2014, Taoyuan, Taiwan. (re-submit to MEE journal)
  136. Win-Der Lee, Chun-Wei Lian, Shea-Jue Wang*, Yi-Hong Yu, Osbert Cheng, LS Huang, Mu-Chun Wang*, “Electrical Quality of 28nm HK/MG MOSFETs with PDA and DPN Treatment,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2014), PID: 240039 (Y5-15), May 2014, Taoyuan, Taiwan.
  137. Shea-Jue Wang, Wen-Sheng Chen, Win-Der Lee, Tsun-Shan Chang, Heng-Sheng Huang, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Mu-Chun Wang*, “GIDL and Gated-Diode Metrologies for 28nm HK/MG nMOSFETs in Nitridation Annealing Temperatures,” IEEE/ International Symposium on Next-Generation Electronics (ISNE 2014), PID: 240045 (Y5-16), May 2014, Taoyuan, Taiwan.
  138. Mu-Chun Wang, Chao-Wang Li, Yu-Hsun Tseng, Shea-Jue Wang, Ming-Feng Lu, Osbert Cheng, LS Huang, Chuan-Hsi Liu, “Early Effect for 28nm HfOx/ZrOy/HfOx Gate Dielectric of NMOSFETs after DPN Process with Different Nitrogen Concentration,” 8th Asia-Pacific International Symposium on the Basics and Applications of Plasma Technology (APSPT-8), PID:PC-006 (P1-34), Dec. 2013, Hsinchu, Taiwan.
  139. Mu-Chun Wang, Chun-Wei Lian, Fu-Chien Chen, Shea-Jue Wang, Ming-Feng Lu, Osbert Cheng, LS Huang, Shih-Ching Lee, “Study of Gate Leakage Characteristics for 28nm HfZrOx PMOSFETs after DPN Process Treatment with Different Nitrogen Concentration,” 8th Asia-Pacific International Symposium on the Basics and Applications of Plasma Technology (APSPT-8), PID:PF-003 (P2-16), Dec. 2013, Hsinchu, Taiwan.
  140. Wen-Sheng Chen, Mu-Chun Wang, Min-Ru Peng, Shea-Jue Wang, Heng-Sheng Huang, Osbert Cheng, LS Huang, “Electrical Characteristics and Hot-Carrier Effect of Stacked HK/MG nMOSFETs under DPN Treatment plus Annealing Temperatures,” 8th Asia-Pacific International Symposium on the Basics and Applications of Plasma Technology (APSPT-8), PID:OB-011 (O4-03), Dec. 2013, Hsinchu, Taiwan.
  141. Mu-Chun Wang, Po-Kai Chen, Win-Der Lee, Fang Hsu, Ming-Feng Lu, Min-Ru Peng, Shea-Jue Wang, LS Huang, Shih-Ching Lee, “Performance of Deep-nano Gate-last HK/MG nMOSFETs using DPN or PDA Process with Annealing Temperatures under Temperature Stress,” 8th Asia-Pacific International Symposium on the Basics and Applications of Plasma Technology (APSPT-8), PID:PF-002 (P2-17), Dec. 2013, Hsinchu, Taiwan.
  142. Mu-Chun Wang, Jie-Min Yang, Shea-Jue Wang, Ming-Feng Lu, Heng-Sheng Huang, Win-Der Lee, LS Huang, Shih-Ching Lee, “Gate Leakage for 28nm HfZrOx Gate Dielectric of PMOSFETs after Decoupled Plasma Nitridation Process with Annealing Temperatures,” 8th Asia-Pacific International Symposium on the Basics and Applications of Plasma Technology (APSPT-8), PID:PB-005 (P1-24), Dec. 2013, Hsinchu, Taiwan.
  143. Mu-Chun Wang, Jing-Zong Jhang, Jian-Liang Lin, Shea-Jue Wang, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Junction and Punch-Through Leakage Mechanisms for 28nm High-k/ Metal Gate of PMOSFETs after PDA Process Treatment,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID:15(P1-09) , Nov. 2013, Nantou, Taiwan.
  144. Mu-Chun Wang, Chun-Wei Lian, Shea-Jue Wang, Po-Kai Chen, Ming-Feng Lu, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih-Ching Lee, “Performance Study for 28nm High-k/Metal Gate of PMOSFETs with Gate-Last Process before and after PDA Treatment,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID:32(P1-10) , Nov. 2013, Nantou, Taiwan.
  145. Mu-Chun Wang, Chao-Wang Li, Shea-Jue Wang, Po-Kai Chen, Ming-Feng Lu, Osbert Cheng, LS Huang, Chuan-Hsi Liu, “Early Effect for 28nm HZH Gate-Stacked NMOSFETs after Post Deposition Annealing Process Treatment,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID: 33(P1-11), Nov. 2013, Nantou, Taiwan.
  146. Mu-Chun Wang, Jie-Min Yang, Shea-Jue Wang, Jian-Liang Lin, Ming-Feng Lu, Osbert Cheng, LS Huang, Shih-Ching Lee, “Study of Gate Leakage for 28nm HfZrOx Gate Dielectric of PMOSFETs after Post Deposition Annealing Process,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID:34 (P1-68), Nov. 2013, Nantou, Taiwan.
  147. M.C. Wang, C.W. Li, S.J. Wang, M.F. Lu, C.W. Lian, W.D. Lee, L.S. Huang, C.H. Liu, “CLM Effect for 28nm Stacked HK/MG NMOSFETs after DPN Process with Different Nitrogen Concentration,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID: 38 (P1-12), Nov. 2013, Nantou, Taiwan.
  148. M.C. Wang, C.W. Lian, S.J. Wang, M.F. Lu, H.S. Huang, J.M. Yang, O. Cheng, LS Huang, S.C. Lee, “Gate Leakage for 28nm High-k/Metal Gate NMOSFETs after DPN Treatment with Different Nitrogen Concentration,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID:41(P1-13) , Nov. 2013, Nantou, Taiwan.
  149. M.C. Wang, J.M. Yang, S.J. Wang, M.F. Lu, C.W. Li, O. Cheng, LS Huang, S.C. Lee, “Gate Leakage Effect for 28nm HK/MG NMOSFETs after DPN Treatment with Different Annealing Temperatures,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID:73 (P1-14), Nov. 2013, Nantou, Taiwan.
  150. W.D. Lee, W.S. Chen, M.C. Wang, J.S. Lan, M.F. Lu, H.S. Huang, J.M. Yang, S.Y. Chen, “Kink Effect for 28nm HK/MG nMOSFETs after DPN Treatment with Different Annealing Temperatures,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID: 155 (P1-18), Nov. 2013, Nantou, Taiwan.
  151. Shih-Ming Chen , Shea-Jue Wang, Shuang-Yuan Chen , Heng-Sheng Huang, Mu-Chun Wang , Wei-Ting Huang, Tsung-Jian Tzeng, Tzyy-Ming Cheng, LS Huang, “The Influence of Nitrogen Concentrations and Annealing Temperatures on HfO2 nMOSFET Properties and PBTI Reliability,” International Electron Devices and Materials Symposium 2013(2013 IEDMS), PID:75 (P1-70), Nov. 2013, Nantou, Taiwan.
  152. Mu-Chun Wang, Jie-Min Yang, Ssu-Hao Peng, Shea-Jue Wang, Chih-Hsuan Wang, Ming-Feng Lu, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih-Ching Lee, “ Gate Leakage Characteristics for 28nm Gate-Last HK/MG NMOSFETs with PDA Process Treatment,” IEEE/ Nanotechnology Materials and Devices Conference (NMDC), paper ID: #1024_WP-4-5, Oct. 2013, Tainan, Taiwan.
  153. Mu-Chun Wang, Chun-Wei Lian, Chong-Kuan Du, Shea-Jue Wang, Ming-Feng Lu, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih-Ching Lee, “Device Characterization for Stacked High-k/Metal Gate of NMOSFETs before and after PDA Process,” IEEE/ Nanotechnology Materials and Devices Conference (NMDC), paper ID: #1025_WP4-4, Oct. 2013, Tainan, Taiwan.
  154. Mu-Chun Wang, Chao-Wang Li, Guo-Wei Wu, Chong-Kuan Du, Shea-Jue Wang, Ming-Feng Lu, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Chuan-Hsi Liu, “Punch-Through Characteristics of High-k/Metal Gate NMOSFETs before and after PDA Treatment,” IEEE/ Nanotechnology Materials and Devices Conference (NMDC), paper ID: #1029_TP-P1-5, Oct. 2013, Tainan, Taiwan.
  155. Mu-Chun Wang, Chih-Hsuan Wang, Chong-Kuan Du, Shea-Jue Wang, Ming-FengLu, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih-Ching Lee, Chuan-Hsi Liu, “Electrical Performance for 28nm HK/MG PMOSFETs by PDA or DPN Treatment with N2 Concentrations,” IEEE/ Nanotechnology Materials and Devices Conference (NMDC), paper ID: #1063_TP-P1-6, Oct. 2013, Tainan, Taiwan.
  156. 王木俊*、彭思豪、廖文翔,“奈米製程CESL壓縮應變與不同矽覆蓋層於pMOSFET之特性與熱載子效應分析”2013電子工程技術研討會(ETS2013), 高雄, 台灣, 5月23日 2013. (Chinese version)
  157. Mu-Chun Wang, Chong-Kuan Du, Min-Ru Peng, Shea-Jue Wang*, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih Ching Lee, “Device Characterizations for 28nm HfOx/ZrOx/HfOx Gate Dielectric of NMOSFET after DPN Process with Nitrogen Concentrations,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H002, May 2013, New Taipei City, Taiwan.
  158. Mu-Chun Wang, Chong-Kuan Du, Min-Ru Peng, Shea-Jue Wang*, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih Ching Lee, “Device Performance for 28nm HfOx/ZrOx/HfOx Gate Dielectric of PMOSFET Dealing with DPN Process under N2 Concentrations,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H003, May 2013, New Taipei City, Taiwan.
  159. Mu-Chun Wang, Ssu-Hao Peng, Shea-Jue Wang*, Chong-Kuan Du, Hsin-Chia Yang, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Gate Leakage Characteristics for 28nm Gate-Last HK/MG of NMOSFET with PDA Process Treatment,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H004, May 2013, New Taipei City, Taiwan.
  160. Mu-Chun Wang, Min-Ru Peng, Shea-Jue Wang*, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih Ching Lee, “VT Adjustment for 28nm HfOx/ZrOx/HfOx Gate Dielectric of nMOSFET using DPN Process with Annealing Temperatures,” 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: PM49, May 2013, New Taipei City, Taiwan.
  161. Mu-Chun Wang, Guo-Wei Wu, Chong-Kuan Du, Shea-Jue Wang*, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Punch-Through Characteristics of 28nm High-k/Metal Gate NMOSFET Devices before and after PDA Treatment,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H006, May 2013, New Taipei City, Taiwan.
  162. Mu-Chun Wang, Jing-Zong Jhang, Chong-Kuan Du, Shea-Jue Wang*, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Junction and Punch-Through Leakage Mechanisms for 28nm High-k/ Metal Gate of PMOSFET Devices after PDA Process Treatment,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H007, May 2013, New Taipei City, Taiwan.
  163. Mu-Chun Wang, Chao-Wang Li, Chong-Kuan Du, Shea-Jue Wang*, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Early Effect for 28nm HfOx/ZrOx/HfOx Gate Dielectric of NMOSFET after Post Deposition Annealing Process,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H008, May 2013, New Taipei City, Taiwan.  
  164. Bing-Mau Chen, Mu-Chun Wang*, Chih-Hsuan Wang, Chong-Kuan Du, Shea-Jue Wang*, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Channel-Length Modulation Effect for 28nm HK/MG PMOSFETs after Post Deposition Annealing Treatment,” 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: PT49, May 2013, New Taipei City, Taiwan.
  165. Mu-Chun Wang, Chun-Wei Lian, Chong-Kuan Du, Shea-Jue Wang*, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih Ching Lee, “Device Characterizations for 28nm High-k/Metal Gate of NMOSFET before and after PDA Process,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H010, May 2013, New Taipei City, Taiwan.
  166. Mu-Chun Wang, Chun-Wei Lian, Chong-Kuan Du, Shea-Jue Wang*, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Performance Investigation for 28nm High-k/Metal Gate of PMOSFET with Gate-last Process before and after PDA Treatment,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H011, May 2013, New Taipei City, Taiwan.
  167. Mu-Chun Wang, Jie-Min Yang, Shea-Jue Wang*, Chong-Kuan Du, Hsin-Chia Yang, Heng-Sheng Huang, Osbert Cheng, LS Huang, Shih Ching Lee, “Gate Leakage for 28nm HfZrOx Gate Dielectric of PMOSFET after Post Deposition Annealing Process,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H012, May 2013, New Taipei City, Taiwan.
  168. Shih-Ming Chen, Mu-Chun Wang*, Min-Ru Peng, Shea-Jue Wang*, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih Ching Lee, “C-V Characteristics for 28nm HfOx/ZrOx/HfOx Gate Dielectric of NMOSFET after DPN Process with Nitrogen Concentrations,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H013, May 2013, New Taipei City, Taiwan.  
  169. Wen-Sheng Chen, Mu-Chun Wang*, Min-Ru Peng, Shea-Jue Wang*, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih Ching Lee, “C-V Characteristics for 28nm HfOx/ZrOx/HfOx Gate Dielectric of NMOSFET after DPN Process with Annealing Temperatures,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H014, May 2013, New Taipei City, Taiwan.
  170. Wei-Jhih Jian, Mu-Chun Wang*, Min-Ru Peng, Shea-Jue Wang*, Shuang-Yuan Chen, Osbert Cheng, LS Huang, Shih Ching Lee, “C-V Characteristics for 28nm HfOx/ZrOx/HfOx Gate Dielectric of NMOSFET before and after PDA Process,” (Accepted) 6th Asia-Pacific Workshop on Widegap Semiconductors (APWS2013), paper ID: H015, May 2013, New Taipei City, Taiwan.
  171. Mu-Chun Wang, Guo-Wei Wu, Shea-Jue Wang*, Hsin-Chia Yang*, Wen-Shiang Liao, Ming-Feng Lu, Jing-Zong Jhang, Chuan-Hsi Liu, “Body Effect of SiGe and CESL Strained Nano-node NMOSFETs on (100) Silicon Substrate,” 2nd 2013 IEEE International Symposium on Next-Generation Electronics (ISNE), pp.379 - 382, Feb. 2013, Kaohsiung, Taiwan.
  172. Mu-Chun Wang, Chong-Kuan Du, Min-Ru Peng, Shea-Jue Wang*, Shuang-Yuan Chen, Chuan-Hsi Liu*, Osbert Cheng, LS Huang, Shih Ching Lee, “Trend of Subthreshold Swing with DPN Process for 28nm N/PMOSFETs,” 2nd 2013 IEEE International Symposium on Next-Generation Electronics (ISNE), pp.389 - 392, Feb. 2013, Kaohsiung, Taiwan.
  173. Mu-Chun Wang, Jing-Zong Jhang, Shea-Jue Wang*, Hsin-Chia Yang*, Wen-Shiang Liao, Ming-Feng Lu, Guo-Wei Wu, Chuan-Hsi Liu, “Probing Moving Charge Distribution of Biaxial and CESL Strained PMOSFETs with Body Effect,” 2nd 2013 IEEE International Symposium on Next-Generation Electronics (ISNE), pp.375-378, Feb. 2013, Kaohsiung, Taiwan.
  174. Mu-Chun Wang, Ssu-Hao Peng, Shea-Jue Wang*, Hsin-Chia Yang*, Wen-Shiang Liao, Chao-Wang Li, Chuan-Hsi Liu, “Si-Capping Thicknesses Impacting Compressive Strained MOSFETs with Temperature Effect,” 2nd 2013 IEEE International Symposium on Next-Generation Electronics (ISNE), pp.361-364, Feb. 2013, Kaohsiung, Taiwan.
  175. Mu-Chun Wang, Min-Ru Peng, Liang-Ru Ji, Heng-Sheng Huang, Shuang-Yuan Chen, Shea-Jue Wang*, Hong-Wen Hsu, Wen-Shiang Liao, Chuan-Hsi Liu*, “Strained pMOSFETs with SiGe Channel and Embedded SiGe Source/Drain Stressor under Heating and Hot-Carrier Stresses,” 2nd 2013 IEEE International Symposium on Next-Generation Electronics (ISNE), pp.371-374, Feb. 2013, Kaohsiung, Taiwan.
  176. Hsin-Chia Yang*, Wei-Yen Peng, Wen-Shiang Liao, Guo-Wei Wu, Cheng-Yu Tsai, Mu-Chun Wang, Sung-Ching Chi, Shea-Jue Wang, “The Side Effects and the Effects of Thickness of Source/Drain Fin on P-channel FinFET Devices,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:313, Jan. 2013, Singapore.
  177. Hsin-Chia Yang*, Yi-Hong Lee, Wen-Shiang Liao, Chong-Kuan Du, Jing-Zong Jhang, Sung-Ching Chi, Mu-Chun Wang, Shea-Jue Wang, “The Adjustment of Threshold Voltage on P-channel FinFET Devices,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:319, Jan. 2013, Singapore.
  178. Hsin-Chia Yang*, Chong-Kuan Du, Wen-Shiang Liao, Jing-Zong Jhang, Yi-Hong Lee, Tsao-Yeh Chen, Ko-Fan Liao, Mu-Chun Wang, Sung-Ching Chi, Shea-Jue Wang, “The Side Effects on N-channel FinFET Devices,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:311, Jan. 2013, Singapore.
  179. Hsin-Chia Yang, Jing-Zong Jhang, Wen-Shiang Liao, Chong-Kuan Du, Yi-Hong Lee, Sung-Ching Chi, Quan-Hao Shen, Mu-Chun Wang, Shea-Jue Wang,” Promising N-channel FinFET Devices without or with Cobalt-Silicide Applied to the Gate,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:305, Jan. 2013, Singapore.
  180. Hsin-Chia Yang, Choa-Wang Li, Wen-Shiang Liao, Chong-Kuan Du, Mu-Chun Wang*, Jie-Min Yang, Chun-Wei Lian, Chuan-Hsi Liu, “The Enhancement of MOSFET Electric Performance through Strain Engineering by Refilled SiGe as Source and Drain,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:422, Jan. 2013, Singapore.
  181. Hsin-Chia Yang*, Jie-Min Yang, Wen-Shiang Liao, Mu-Chun Wang, Shea-Jue Wang, Chun-Wei Lian ,Chao-Wang Li ,Chong-Kuan Du, “The Improvement of MOSFET Electric Characteristics through Strain Engineering by Refilled SiGe as Source and Drain,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:429, Jan. 2013, Singapore.
  182. Min-Ru Peng, Mu-Chun Wang*, Liang-Ru Ji, Heng-Sheng Huang, Shuang-Yuan Chen, Shea-Jue Wang, Hong-Wen Hsu, Wen-Shiang Liao, “Characteristics and Hot-Carrier Effects of Strained pMOSFETs with SiGe Channel and Embedded SiGe Source/Drain Stressor,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:257, Jan. 2013, Singapore.
  183. H.W. Hsu*, H. S. Huang, S. Y. Chen, M. C. Wang, K.C. Li, K. C. Lin, C. H. Liu, “Impact of Stress Induced by Stressors on Hot Carrier Reliability of Strained nMOSFETs,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:237, Jan. 2013, Singapore.
  184. Hsin-Chia Yang*, Guo-Wei Wu, Wen-Shiang Liao, Wei-Yen Peng, Sung-Ching Chi, Mu-Chun Wang, Shea-Jue Wang, “Next Promising P-channel FinFET Devices without or with Cobalt-Silicide Applied to the Gate,” 5th 2013 IEEE International NanoElectronics Conference (INEC), paper ID:316, Jan. 2013, Singapore.
  185. Mu-Chun Wang, Ssu-Hao Peng, Wen-Shiang Liao, Tung-Cheng Huang, Hsin-Chia Yang, Jing-Zong Jhang, Shea-Jue Wang*, Chuan-Hsi Liu. “Nano-regime Si-Capping Thicknesses Impacting Strained pMOSFET on <110> Silicon Substrate,” 2012 IEDMS, paper ID: CP-27, Nov., 2012, Kaohsiung, Taiwan.
  186. Hsin-Chia Yang, Guo-Wei Wu, Wen-Shiang Liao, Ssu-Hao Peng, Mu-Chun Wang*, Tung-Cheng Huang, Shea-Jue Wang, “Temperature Effects on Drain Fringe Junction Capacitances of Strained pMOSFET Devices,” 2012 IEDMS, paper ID: C017, Nov., 2012, Kaohsiung, Taiwan.
  187. Hsin-Chia Yang*, Chong-Kuan Du, Wen-Shiang Liao, Jing-Zong Jhang, Yi-Hong Lee, Tsao-Yeh Chen, Mu-Chun Wang, “Fin-Thickness Effects on p-Channel FinFET Devices,” 2012 IEDMS, paper ID: DP-11, Nov., 2012, Kaohsiung, Taiwan.
  188. Hsin-Chia Yang, Chao-Wang Li, Wen-Shiang Liao, Chong-Kuan Du, Mu-Chun Wang*, Shea-Jue Wang, Chun-Wei Lian, Chuan-Hsi Liu, “Strain Effects on Nano-PMOSFET Devices Fabricated with Refilled S/D SiGe Technology,” 2012 IEDMS, paper ID: CO20, Nov., 2012, Kaohsiung, Taiwan.
  189. Hsin-Chia Yang, Jie-Min Yang, Wen-Shiang Liao, Chong-Kuan Du, Ssu-Hao Peng, Mu-Chun Wang*, Shea-Jue Wang, Chuan-Hsi Liu, Chao-Wang Li, “Strain Effects on Nano-NMOSFET Devices with Refilled S/D SiGe Process Technology,” 2012 IEDMS, paper ID: DP-10, Nov., 2012, Kaohsiung, Taiwan.
  190. Hsin-Chia Yang*, Yi-Hong Lee, Wen-Shiang Liao, Chong-Kuan Du, Mu-Chun Wang, Shea-Jue Wang, “Fin-Thickness Effects on p-Channel FinFET Devices with Cobalt Silicide as Gate,” 2012 IEDMS, paper ID: CP-01, Nov., 2012, Kaohsiung, Taiwan.
  191. Hsin-Chia Yang, Chun-Wei Lian, Wen-Shiang Liao, Chong-Kuan Du, Mu-Chun Wang*, Shea-Jue Wang, Jie-Min Yang, Chuan-Hsi Liu, “Strain Effects on Nano-NMOSFET Devices Following Refilled Source/ Drain Silicon Technology,”  2012 IEDMS, paper ID: CP-28, Nov., 2012, Kaohsiung, Taiwan.
  192. Hsin-Chia Yang*, Jing-Zong Jhang, Wen-Shiang Liao, Wei-Yen Peng, Ssu-Hao Peng, Mu-Chun Wang, Shea-Jue Wang, “Fin-Thickness Effects on n-Channel FinFET Devices with Cobalt Silicide as Gate,” 2012 IEDMS, paper ID: CP-26, Nov., 2012, Kaohsiung, Taiwan.
  193. Hsin-Chia Yang*, Wei-Yen Peng, Wen-Shiang Liao, Chong-Kuan Du, Mu-Chun Wang, Shea-Jue Wang, “Fin-Thickness Effects on the Electric Performances of PMOSFET Devices Using FinFET Structure,” 2012 IEDMS, paper ID: DP-09, Nov., 2012, Kaohsiung, Taiwan.
  194. Wei-Ting Huang, Yu Chen, Mu-Chun Wang*, Heng-Sheng Huang, Shuang-Yuan Chen, LS Huang, “Predicting Breakdown Characteristics of Nano-scaled HfO2 Gate Dielectric by Ramping Metrology,” 2012 IEDMS, paper ID: CP-29, Nov., 2012, Kaohsiung, Taiwan.
  195. Hsin-Chia Yang*, Ko-Fan Liao, Wen-Shiang Liao, Mu-Chun Wang, “Threshold Voltages of NMOSFET Devices using FinFET Structure,” 2012 IEDMS, paper ID: CP-08, Nov., 2012, Kaohsiung, Taiwan.
  196. Hsin-Chia Yang*, Cheng-Yu Tsai, Wen-Shiang Liao, Tsao-Yeh Chen, Mu-Chun Wang, “Determination of Threshold Voltages of PMOSFET Devices using FinFET Structure,” 2012 IEDMS, paper ID: CP-11, Nov., 2012, Kaohsiung, Taiwan.
  197. Hsin-Chia Yang*, Guan-Hao Shen, Wen-Shiang Liao, Tsao-Yeh Chen, Mu-Chun Wang, “Threshold Voltages of MOSFET Devices Using 3-D FinFET Structure,” 2012 IEDMS, paper ID: CP-13, Nov., 2012, Kaohsiung, Taiwan.
  198. H. W. Hsu, H. S. Huang, C. C. Lee, M. C. Wang, H. H. Teng, Y. S. Hu, M. R. Peng, H. Sekiguchi, S. Y. Chen, C. H. Liu, “Comparison of NMOSFET and PMOSFET devices that combine CESL stressor and SiGe channel,” Nano Korea 2012 Symposium, paper ID: P1201_171, Aug. 2012, Korea.
  199. Mu-Chun Wang*, Tien-Tsorng Shih, Bao-Yi Lin, Hsin-Chia Yang, Yaw-Dong Wu, Chuan-Hsi Liu, “A Study of Characteristics of Halogen-Free Prevented Solder Materials,” IEEE/ 2012 International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), pp.101-104, Aug., 2012, Guilin, China.
  200. H. W. Hsu, H. S. Huang, C. C. Lee, S. Y. Chen, H. H. Teng, M. H. Hung, M. R. Peng, M. C. Wang, C. H. Liu, “Phenomenon of nMOSFETs with CESL stressor for different channel lengths,” 6th International Conference on Technological Advances of Thin Films & Surface Coatings (ThinFilms2012), Paper ID: 2318, July, 2012, Singapore.
  201. Mu-Chun Wang*, Guo-Wei Wu, Wen-Shiang Liao, Hsin-Chia Yang, Tsao-Yeh Chen, “Junction Potential of Uniaxial CESL Strained Nano-regime pMOSFETs on <100> Silicon Wafer,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A1., May, 2012, Taiwan.
  202. Mu-Chun Wang*, Yi-Hong Lee, Wen-Shiang Liao, Chung-Kuan Du, Hsin-Chia Yang, Tsao-Yeh Chen, “Junction Potential of Strained Nano-regime nMOSFETs on <100> Silicon Wafer with Refilled Si S/D and Compressive CESL Processes,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B3., May, 2012, Taiwan.
  203. Tsao-Yeh Chen, Chung-Kuan Du, Wen-Shiang Liao, Jing-Zong Jhang, Hsin-Chia Yang, Tsao-Yeh Chen, Ming-Feng Lu, Mu-Chun Wang*, “A Study of Junction Potential of Refilled Si S/D Process for Nano-regime MOSFETs on <100> Silicon Wafer,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A3., May, 2012, Taiwan.
  204. Mu-Chun Wang*, Jing-Zong Jhang, Wen-Shiang Liao, Hsin-Chia Yang, Tsao-Yeh Chen, Ming-Feng Lu, “Nano-scale Compressive Strained CESL Impacting Junction Potential of pMOSFETs on <100> Si Wafer,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A10., May, 2012, Taiwan.
  205. Mu-Chun Wang*, Ssu-Hao Peng, Wen-Shiang Liao, Hsin-Chia Yang, Tsao-Yeh Chen, Ming-Feng Lu, “Junction Potential vs. Channel Lengths of Compressive/ Tensile Strained CESL Nano-regime nMOSFETs on <100> Silicon Wafer,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B14., May, 2012, Taiwan.
  206. Hsin-Chia Yang, Wei-Yen Peng, Wen-Shiang Liao, Ssu Hao Peng, Tsao-Yeh Chen, Mu-Chun Wang*, “Variation of Junction Potential of Nano-regime nMOSFET with Tensile Strained CESL Process on <100> Si Wafer,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B15., May, 2012, Taiwan.
  207. Mu-Chun Wang*, Kuang-Chuan Cheng, Wen-Shiang Liao, Hsin-Chia Yang, Tsao-Yeh Chen, “Nano-Scale CESL Strain and Refilled S/D SiGe Process Influencing Junction Performance on <110> Silicon Substrate,” 10th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B21., May, 2012, Taiwan.
  208. Mu-Chun Wang*, Min-Ru Peng, Wen-Shiang Liao, Shuang-Yuan Chen, Ssu-Hao Peng, Heng-Sheng Huang, “Distinguishing Junction Breakdown and Punch-through Characteristics for Uniaxial CESL Strained Nano-regime N/PMOSFETs on <100> Silicon Substrate,” 2011 IEDMS, paper ID:086; P-C-21, Nov., 2011, Taipei, Taiwan.
  209. Hsin-Chia Yang*, Chong-Kuan Du, Wen-Shiang Liao, Yi-Jhen Li, Mu-Chun Wang, Tsao-Yeh Chen, “Promising Reliability of Refilled S/D Strained N/PMOSFET Devices Fabricated on <100> Substrate Linked to Junction Breakdown, and Punch-Through,” 2011 IEDMS, paper ID:092; P-C-22, Nov., 2011, Taipei, Taiwan.
  210. Hsin-Chia Yang*, Jing-Zong Jhang, Wen-Shiang Liao, Yi-Jhen Li, Mu-Chun Wang, “Distinguishing Reliability of CESL Strained N/PMOSFET Devices Fabricated on <110> Substrate Correlated with Junction Breakdown, and Punch-Through,” 2011 IEDMS, paper ID:090; P-D-19, Nov., 2011, Taipei, Taiwan.
  211. Hsin-Chia Yang*, Yi-Jhen Li, Wen-Shiang Liao, Mu-Chun Wang, “Distinguishing Characteristics of Refilled S/D Strained NMOSFET Devices Fabricated on <110> Substrate Associated with Junction Breakdown, and Punch-Through,” 2011 IEDMS, paper ID:084; P-D-15, Nov., 2011, Taipei, Taiwan.
  212. Hsin-Chia Yang*, Guo-Wei Wu, Wen-Shiang Liao, Yi-Jhen Li, Mu-Chun Wang, “Promising Characteristics of CESL Strained PMOSFET Devices Fabricated on <100> Substrate Correlated with Junction Breakdown, and Punch-Through,” 2011 IEDMS, paper ID:089; P-D-18, Nov., 2011, Taipei, Taiwan.
  213. Hsin-Chia Yang*, Jhe-Chuen Yeh, Wen-Shiang Liao, Mu-Chun Wang, “Distinguishing Repeatability of CESL Strained NMOSFET Devices Fabricated on <100> Substrate Associated with Junction Breakdown, and Punch-Through,” 2011 IEDMS, paper ID:083; P-C-20, Nov., 2011, Taipei, Taiwan.
  214. Heng-Sheng Huang, Liang-Ru Ji, Sheng-Jung Lin, Shuang-Yuan Chen, Mu-Chun Wang, Wen-Shiang Liao, “Characteristics of SiGe Channel and Embedded SiGe S/D Strained PMOSFETs,” 2011 IEDMS, paper ID:154; P-C-37, Nov., 2011, Taipei, Taiwan.
  215. Heng-Sheng Huang, Zen-Fan Huang, Kuan-Cheng Li, Shuang-Yuan Chen, Mu-Chun Wang, Wen-Shiang Liao, “Characteristics of the Hot-Carrier Effect on Strained nMOSFETs with Tensile and Compressive CESL Stressors,” 2011 IEDMS, paper ID:159; P-C-40, Nov., 2011, Taipei, Taiwan.
  216. Tien-Tsorng Shih, Bing-Hua Chen, Win-Der Lee, Mu-Chun Wang*, “IMC Integrity for Sn96.7‐Ag3.7 Polymer Core Solder Ball in BGA Package,” IEEE/IMPACT, paper code: TW073-1, pp.484-487, Oct., 2011, Taipei, Taiwan.
  217. Tien-Tsorng Shih, Bing-Hua Chen, Win-Der Lee, Mu-Chun Wang*, “Drop Test for Sn96.7‐Ag3.7 Polymer Core Solder Ball in BGA Package,” IEEE/IMPACT, paper code: TW073-2, pp.188-191, Oct., 2011, Taipei, Taiwan.
  218. Tien-Tsorng Shih, Bing-Hua Chen, Win-Der Lee, Mu-Chun Wang*, “Reflow Influence for Sn96.7‐Ag3.7 Polymer Core Solder Ball in BGA Package,” IEEE/IMPACT, paper code: TW073-3, pp.488-491, Oct., 2011, Taipei, Taiwan.
  219. Tien-Tsorng Shih, Wei-Chih Chen, Win-Der Lee, Mu-Chun Wang*, “Solder Stability for Pb‐free HBGA Assembly with Oxygenous Reflow,” IEEE/IMPACT, paper code: TW073-4, pp.492-495, Oct., 2011, Taipei, Taiwan.
  220. Tien-Tsorng Shih, Wei-Chih Chen, Win-Der Lee, Mu-Chun Wang*, “Nickel Solder Ball Performance for Pb‐free LFBGA Assembly under Oxygenous Reflow,” IEEE/IMPACT, paper code: TW073-5, pp.496-499, Oct., 2011, Taipei, Taiwan.
  221. Tien-Tsorng Shih, Wei-Chih Chen, Win-Der Lee, Mu-Chun Wang*, “Oxygenous Reflow Affecting Performance of Pb‐free TFBGA Assembly,” IEEE/IMPACT, paper code: TW073-6, pp.500-503, Oct., 2011, Taipei, Taiwan.
  222. Mu-Chun Wang*, Hsin-Chia Yang, Chuan-Hsi Liu, Ren-Hau Yang, “SOP Package Surface Discoloration after PCT Test,” IEEE/ 2011 International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), F-025, Aug., 2011, Shanghai, China.
  223. Mu-Chun Wang*, Long-Sian Lin, Wen-Shiang Liao, Ren-Hau Yang, Hsin-Chia Yang, Heng-Sheng Huang, “Embedded SiGe Source/Drain and Temperature Degrading Junction Performance on <110> 45 nm MOSFETs,” 4th 2011 IEEE International NanoElectronics Conference (INEC), June, 2011, Taoyuan, Taiwan.
  224. Mu-Chun Wang*, You-Ming Hu, Wen-Shiang Liao, Hsin-Chia Yang, Ren-Hau Yang, Long-Sian Lin, Ssu-Hao Peng,  Shuang-Yuan Chen, “Deterioration of Junction Performance with Temperature Effect for 45 nm Si-Capping MOSFETs on <110> Silicon Substrate,” 4th 2011 IEEE International NanoElectronics Conference (INEC), June, 2011, Taoyuan, Taiwan.
  225. Mu-Chun Wang*, Ren-Hau Yang, Wen-Shiang Liao, Hsin-Chia Yang, Yi-Jhen Li, Heng-Sheng Huang, “Nano-Scale Si-Capping Thicknesses Impacting Junction Performance on <110> Silicon Substrate,” 4th 2011 IEEE International NanoElectronics Conference (INEC), June, 2011, Taoyuan, Taiwan.
  226. Hsin-Chia Yang*, Huei-Jyun Peng, Wen-Shiang Liao, Jhe-Chuan Yeh, Mu-Chun Wang, “Study of Temperature Effects of Mobility, Swing, and Early Voltages on Strained MOSFET Devices,” 4th 2011 IEEE International NanoElectronics Conference (INEC), June, 2011, Taoyuan, Taiwan..
  227. H.-W. Chen, C.-H. Liu*, H.-W. Hsu, S.-Y. Chen, M.-C. Wang, H.-S. Huang, “Current Conduction Mechanisms of 0.65 nm Equivalent Oxide Thickness HfZrLaO Thin Films,” 4th 2011 IEEE International NanoElectronics Conference (INEC), June, 2011, Taoyuan, Taiwan.
  228. C.-H. Liu*, H.-W. Hsu, H.-W. Chen, M.-C. Wang, S.-Y. Chen, H.-S. Huang, “Time Dependent Dielectric Breakdown (TDDB) Characteristics of Metal-Oxide-Semiconductor Capacitors with HfLaO and HfZrLaO Ultra-Thin Gate Dielectrics,” 4th 2011 IEEE International NanoElectronics Conference (INEC), June, 2011, Taoyuan, Taiwan.
  229. Cheng-Huang Tsao*, Jui-Ming Tsai, Wen-Shiang Liao, Hsin-Chia Yang, Mu-Chun Wang, “Promoted Electrical Performance and Temperature Effects of Strained Short-Channel Transistors,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A4., May, 2011, Taiwan.
  230. Mu-Chun Wang*, Ren-Hau Yang, Wen-Shiang Liao, Hsin-Chia Yang, “Variation of Channel Resistance for Nano-regime MOSFETs under Different Si Capping Thickness Depositing CESL Inducing Compressive Strain on <110> Si Wafer,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B2., May, 2011, Taiwan.
  231. Hsin-Chia Yang, Yao-Yuan Hoe, Wen-Shiang Liao, Ren-Hau Yang, Mu-Chun Wang*, “Compressive/ Tensile Strained CESL Impacting Channel Resistance for Nano-regime <100> nMOSFETs,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A6., May, 2011, Taiwan.
  232. Mu-Chun Wang*, Yi-Chen Li, Wen-Shiang Liao, Ren-Hau Yang, Hsin-Chia Yang, “Channel Resistance for Nano-regime Biaxial Strained MOSFETs on <110> Silicon Substrate,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B26., May, 2011, Taiwan.
  233. Heng-Sheng Huang, Long-Sain Lin, Wen-Shiang Liao, Mu-Chun Wang*, “A Study of Channel Resistance and Temperature Effect for <110> pMOSFET with Embedded SiGe Source/Drain Technology,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B7, May, 2011, Taiwan.
  234. Shuang-Yuan Chen, You-Ming Hu, Wen-Shiang Liao, Mu-Chun Wang*, “Junction Leakage Performance with Temperature Effect for <110> 45 nm pMOSFETs Applied with Si-Capping and Refilled Source/Drain Process Technology,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A7., May, 2011, Taiwan.
  235. Mu-Chun Wang*, Kuo-Hua Wu, Wen-Shiang Liao, Ren-Hau Yang, Hsin-Chia Yang, “Variation of Channel Resistance for Nano-regime pMOSFETs under Refilled S/D SiGe Strain and Different Si Capping Thicknesses on <110> Si Wafer,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, paper number B3., May, 2011, Taiwan.
  236. Hsin-Chia Yang, Min-Ru Peng, Wen-Shiang Liao, Ren-Hau Yang, Mu-Chun Wang* , “Resistor Characteristics of Uniaxial CESL Strained Nano-regime nMOSFETs on <100> Silicon Wafer,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A5., May, 2011, Taiwan.
  237. Wen-Shiang Liao, Yi-Sin Peng, Hsin-Chia Yang, Ren-Hau Yang, Mu-Chun Wang*, “Junction Leakage Efficiency for Nano-regime nMOSFETs between Si Capping Layers on <110> Wafer and Conventional <100> Wafer,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A18., May, 2011, Taiwan.
  238. Wen-Shiang Liao, Yi-Sin Peng, Hsin-Chia Yang, Ren-Hau Yang, Mu-Chun Wang*, “Nano-regime pMOSFET Channel Resistance with Non-strained <100> and Strained <110> Wafers,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A19., May, 2011, Taiwan.
  239. Hsin-Chia Yang, Yi-Cheng Luo, Wen-Shiang Liao, Ren-Hau Yang, Mu-Chun Wang*, “A Study to Channel Resistance for <100> Strained PMOSFETs with Different Si Capping Layers,” 9th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, paper number A20, May, 2011, Taiwan.
  240. Mu-Chun Wang, Ren-Hau Yang, Wen-Shiang Liao, Hsin-Chia Yang, Yi-Cheng Luo, Zhen-Ying Hsieh, Heng-Sheng Huang, “Mobility Enhancement on Nano-strained NMOSFET with Epitaxial Silicon Buffer Layers,” 2010 IEEE International Symposium on Next-Generation Electronics, pp. 237-240, Nov. 2010, KaoHsiung, Taiwan.
  241. Mu-Chun Wang, Hsin-Chia Yang, Wen-Shiang Liao, Hsiu-Yen Yang, Yao-Yuan Hoe, Kuang-Hung Lin, Shuang-Yuan Chen, “CESL Deposition Promoting n/p MOSFETs under 45-nm-node Process Fabrication,” 2010 IEEE International Symposium on Next-Generation Electronics, pp. 17-20, Nov. 2010, KaoHsiung, Taiwan.
  242. Chiao-Lo Chiang, Mu-Chun Wang, Yu-Min Chung, Chung-Ming Chu, Shou-Kong Fan, Chin-Chia Kuo, I-Shan Yen, “ELFR Experiment Test Verifying Anomaly of Nano-DRAM Products in W-Plug Process,” 2010 IEEE International Symposium on Next-Generation Electronics, pp. 250-253, Nov. 2010, KaoHsiung, Taiwan.
  243. Hsin-Chia Yang, Wen-Shiang Liao, Min-Ru Peng, Mu-Chun Wang, Zhen-Ying Hsieh, Shuang-Yuan Chen, Heng-Sheng Huang, “Study of Nano-regime Strained MOSFETs with Temperature Effect,” 2010 IEEE International Symposium on Next-Generation Electronics, pp. 186-189, Nov. 2010, KaoHsiung, Taiwan.
  244. Long-Sian Lin, Mu-Chun Wang, Wen-Shiang Liao, Shuang-Yuan Chen, Wei-Luen Huang, Heng-Sheng Huang, “Temperature Dependence of Carrier Mobility Variation in Nanoscale Strained (110) MOSFETs,” 2010 International Electron Devices and Materials Symposia (IEDMS), paper number: P-B-25, Nov. 2010, Taoyuan, Taiwan.
  245. Hsin-Chia Yang , Min-Ru Peng, Wen-Shiang Liao, Mu-Chun Wang, Shuang-Yuan Chen, Heng-Sheng Huang, “Characteristics of Uni-axial Strained Nano-scale nMOSFETs with CESL Process on <100> Silicon Substrate,” 2010 International Electron Devices and Materials Symposia (IEDMS), paper number: P-D-14, Nov. 2010, Taoyuan, Taiwan.
  246. Hsin-Chia Yang, Yi-Cheng Luo, Wen-Shiang Liao, Mu-Chun Wang, Shuang-Yuan Chen, Heng-Sheng Huang, “A Study on N/P-Type Short / Long Channel Strained Devices on <100> Substrate with Various Thicknesses of Si-Cap Layer at Different Testing Temperatures,” 2010 International Electron Devices and Materials Symposia (IEDMS), paper number: P-D-35, Nov. 2010, Taoyuan, Taiwan.
  247. Hsin-Chia Yang, Huei-Jyun Peng, Wen-Shiang Liao, Mu-Chun Wang, Shuang-Yuan Chen, Heng-Sheng Huang , “Performance of Nanoscale Strained PMOSFET Devices Measured at Different Temperatures,” 2010 International Electron Devices and Materials Symposia (IEDMS), paper number: P-D-32, Nov. 2010, Taoyuan, Taiwan.
  248. Hsin-Chia Yang, Yao-Yuan Hoe, Wen-Shiang Liao, Mu-Chun Wang, Shuang-Yuan Chen, Heng-Sheng Huang, “N/PMOSFET Characteristics Fabricated on <100> Silicon Substrate Using Strained Technology at Different temperatures,” 2010 International Electron Devices and Materials Symposia (IEDMS), paper number: P-D-33, Nov. 2010, Taoyuan, Taiwan.
  249. Shuang-Yuan Chen, Kuan-Cheng Li, Kuang-Hung Lin, Heng-Sheng Huang, Mu-Chun Wang, Wen-Shiang Liao, “Characterization of Strained MOSFETs with Tensile and Compressive CESL Stressors,” 2010 International Electron Devices and Materials Symposia (IEDMS), paper number: P-B-13, Nov. 2010, Taoyuan, Taiwan.
  250. Mu-Chun Wang, Kuo-Shu Huang, Shuang-Yuan Chen, Zhen-Ying Hsieh, Hsin-Chia Yang, Chuan-Hsi Liu, Chii-Ruey Lin, “Efficiency of Dispenser with Nozzle Technology in Assembly,” IEEE/ 2010 International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), pp. 476-479, Aug., 2010, Xi’an, China.
  251. Mu-Chun Wang, Kuo-Shu Huang, Zhen-Ying Hsieh, Hsin-Chia Yang, Chuan-Hsi Liu, Chii-Ruey Lin, “A Study to Performance of Electroplating Solder Bump in Assembly,” IEEE/ 2010 International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), pp.794-797, Aug., 2010, Xi’an, China.
  252. Mu-Chun Wang, Kuo-Shu Huang, Zhen-Ying Hsieh, Hsin-Chia Yang, Chuan-Hsi Liu, Chii-Ruey Lin, “Performance of Silver-Glue Attachment Technology in Assembly,” IEEE/ 2010 International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), p. 472-475, Aug., 2010, Xi’an, China.
  253. Wen-Shiang Liao, Hsiu-Yen Yang, Zhen-Ying Hsieh, Hsin-Chia Yang, Mu-Chun Wang, “A Study of 45-nm n/p Strained Silicon Transistors with Different Silicon Capping Thicknesses,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2010, Taiwan
  254. Wen-Shiang Liao, Ren-Hau Yang , Zhen-Ying Hsieh, Hsin-Chia Yang, Mu-Chun Wang, “DIBL Metrology Analyzing SiO2 Buffer Layer Impacting 45-nm Strained Silicon nMOSFET,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2010, Taiwan
  255. Wen-Shiang Liao, Fu-Yu You, Zhen-Ying Hsieh, Hsin-Chia Yang, Mu-Chun Wang, “The Carrier Transport of N/P Silicon-Strained Transistors in <100> and <110> Plane Orientation,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2010, Taiwan
  256. Wen-Shiang Liao, Shih-Ying Chang, Zhen-Ying Hsieh, Hsin-Chia Yang, Mu-Chun Wang, “Characteristics of 45-nm Strained PMOSFETs Deposited with Stressed Silicon-Nitride Film,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Device Group, pp., May, 2010, Taiwan
  257. Zhen-Ying Hsieh, Yao-Yuan Hoe, Hsin-Chia Yang, Wen-Shiang Liao, Mu-Chun Wang, “N/PMOSFET Characteristics with <110> Silicon Substrate under Uni-axial Strain,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, pp., May, 2010, Taiwan
  258. Hsin-Chia Yang, Min-Ru Peng, Zhen-Ying Hsieh, Wen-Shiang Liao, Mu-Chun Wang, “Characteristics of Uni-axial Strained Nano-scaled nMOSFETs with CESL Process on <100> Silicon Substrate,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, pp., May, 2010, Taiwan
  259. Hsin-Chia Yang, Huei-Jyun Peng, Zhen-Ying Hsieh, Wen-Shiang Liao, Mu-Chun Wang, “Investigation of Nano-scaled Uni-axial Strained MOSFETs with S/D SiGe Process,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, pp., May, 2010, Taiwan
  260. Hsin-Chia Yang, Yi-Cheng Luo, Zhen-Ying Hsieh, Wen-Shiang Liao, Mu-Chun Wang, “A Study of p-channel Strained Device on <110> Silicon Substrate with Epi-Si Buffer Layer,” 2010 8th Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Material Group, pp., May, 2010, Taiwan
  261. Shuang-Yuan Chen, Kuang-Hung Lin, Chia-Hao Tu, Po-Yi Wu, Heng-Sheng Huang, Mu-Chun Wang, Ze-Wei Jhou, Cheng-Jyi Chang, Sam Chou, and Joe Ko, “CHC and NBTI Effects on PMOSFETs Having Different Vt Implants in 65 nm Technology,” 2009 International Electron Devices and Materials Symposia (IEDMS), paper number 213., Nov. 2009, Taoyuan, Taiwan.
  262. Mu-Chun Wang, Hsiang-Lin Yang, Zhen-Ying Hsieh, Chen-Nan Lin, Chung-Ming Chu, Shou-Kong Fan, “An Efficient Metrology to Sense Micro-metal Contamination in Fine-Pitch Package,” IEEE/IMPACT, pp. 648-651, Oct., 2009, Taipei, Taiwan
  263. Mu-Chun Wang, Zhen-Ying Hsieh, Kuo-Shu Huang, Chiao-Hao Tu, Shuang-Yuan Chen, Heng-Sheng Huang, “A Study to Stencil Printing Technology for Solder Bump Assembly,” IEEE/IMPACT, pp. 231-234, Oct., 2009, Taipei, Taiwan
  264. Mu-Chun Wang, Zhen-Ying Hsieh, Kuo-Shu Huang, Chuan-Hsi Liu, Chii-Ruey Lin, “Analysis of Promising Copper Wire Bonding in Assembly Consideration,” IEEE/IMPACT, pp.108-111, Oct., 2009, Taipei, Taiwan (One of candidates of the best student paper awards)
  265. Mu-Chun Wang, Kuo-Shu Huang, Zhen-Ying Hsieh, Hsiang-Lin Yang, Shuang-Yuan Chen, Shou-Kong Fan, “Influence of Plastic Assembly Yield with Molding Technology,” IEEE/IMPACT, pp. 652-655, Oct., 2009, Taipei, Taiwan
  266. Mu-Chun Wang, Kuo-Shu Huang, Zhen-Ying Hsieh, Chiao-Hao Tu, Shuang-Yuan Chen, Heng-Sheng Huang “Efficiency Analysis of Electroplating Gold Bump in Assembly,” IEEE/IMPACT, pp.656-659, Oct., 2009, Taipei, Taiwan
  267. Mu-Chun Wang, Hsiang-Lin Yang, Chen-Nan Lin, Fu-Chun Huang, Shou-Kong Fan, “Integrated-Circuit Failure Analysis Contaminated by Metal Particle in Package Process,” 2009 7h Conference on Microelectronics Technology and Applications at National KaoHsiung Marine University, Semiconductor Package Group, pp., May, 2009, Taiwan.
  268. Shuang-Yuan Chen, Shih-Hong Chien, Chia-Hao Tu, Li-Wei Wu, Heng-Sheng Huang, Mu-Chun Wang, Ssu-Han Wu, Cheng-Jyi Chang, Sam Chou, and Joe Ko, “Elevated Temperature Hot-Carrier Effects on 90 nm Narrow-Width nMOSFETs,” 2008 International Electron Devices and Materials Symposia (IEDMS), CP512, pp.1-4, Nov. 2008, Taichung, Taiwan.
  269. Shuang-Yuan Chen, Po-Yi Wu, Chia-Hao Tu, Ai-Erh Chuang, Heng-Sheng Huang, Mu-Chun Wang, Ze-Wei Jhou, Cheng-Jyi Chang, Sam Chou, and Joe Ko, “Bias Temperature Instability and Hot-Carrier Effects on 90 nm Node MOSFETs,” 2008 International Electron Devices and Materials Symposia (IEDMS), CP509, pp. 1-4, Nov. 2008, Taichung, Taiwan.
  270. S. Y. Chen, C. H. Tu, M. C. Wang, S. H. Wu, Z. W. Jhou, C. J. Chang, J. Ko and H. S. Haung, “ Modeling of Substrate Current of MOSFETs under Different Gate Biases and Temperatures,” 2008 International Conference on Solid State Devices and Materials (SSDM2008), pp432-433, Sept. 2008, Tsukuba, Japan.
  271. Mu-Chun Wang, Zhen-Ying Hsieh, Kuo-Su Huang, Shuang-Yuan Chen, Heng-Sheng Huang, “Back-Side Wafer Grinding Quality Affecting Back-End Assembly Process for LCD Driver ICs,” 2008 ASME/ International Conference and Exhibition on Integration and Commercialization of Micro and Nano-systems, MNC-2008_70014, June, 2008, Hong-Kong, China.
  272. Mu-Chun Wang, Zhen-Ying Hsieh, Kuo-Su Huang, Shuang-Yuan Chen, Heng-Sheng Huang, “Investigation of Dicing Saw Methods Impacting Back-End Assembly Process,” 2008 ASME/ International Conference and Exhibition on Integration and Commercialization of Micro and Nano-systems, MNC-2008_70015, June, 2008, Hong-Kong, China.
  273. Mu-Chun Wang, Kuo-Su Huang, Zhen-Ying Hsieh, Shuang-Yuan Chen, Heng-Sheng Huang, “Avoidance of Bonding Pad Contamination Affecting Back- End Assembly Process,” 2008 ASME/ International Conference and Exhibition on Integration and Commercialization of Micro and Nano-systems, MNC-2008_70016, June, 2008, Hong-Kong, China.
  274. M.C. Wang, Z.Y. Hsieh , C.H. Tu , S.Y. Chen , H.W. Chen , A.E. Chuang, H.S. Huang , Sam Chou,” Extra-Inversion Charge Enhancing Substrate Current During Increased Substrate Bias in 90nm Process,” 213th  ECS Meeting, H6_1066, May 2008, Phoenix, USA.
  275. M.C. Wang, K.S. Huang, Z.Y. Hsieh, H.S. Huang,” Promotion of ESD-CDM Immunity in Dicing Saw Process,”213th  ECS Meeting, E3_0721, May 2008, Phoenix, USA.
  276. 王木俊、陳雙源、莊愛爾、謝禎穎、周昇元、黃恆盛, “使用閘極二極體量測方法探討以90奈米製程不同氧化層厚度pMOSFET之負偏壓溫度不穩定性,” 2008 第六屆微電子技術發展與應用研討會, 系統元件組, pp.128-133, 五月, 2008, 高雄 台灣.  (Chinese version)
  277. Mu-Chun Wang, Chih-Chin Lo, Zhen-Ying Hsieh, and Yin-Chin Chu, ,” Analysis of Device Integrity with Micro-Cleaving Technology in Advanced Copper Process,” 2008 International Academic Conference at Ming-Chuan University, Electronic Group, pp.1-7, Mar., 2008, Taoyan, Taiwan.
  278. Mu-Chun Wang, Kuo-Su Huang, and Jen-lung Su,” Analysis and Avoidance of Bonding Pad Contamination Impacting Back- End Assembly Process,” 2008 International Academic Conference at Ming-Chuan University, Electronic Group, pp.36-41, Mar., 2008, Taoyan, Taiwan.
  279. Mu-Chun Wang, Kuo-Su Huang, and Ping-Shing Jiang,” Analysis of Dicing Saw Methods Influencing Back-End Assembly Process,” 2008 International Academic Conference at Ming-Chuan University, Electronic Group, pp.80-88, Mar., 2008, Taoyan, Taiwan
  280. Mu-Chun Wang, Kuo-Su Huang, and Yi-Chiun Deng,” Analysis of Back-Side Wafer Grinding Quality Impacting Back- End Assembly Process,” 2008 International Academic Conference at Ming-Chuan University, Electronic Group, pp.60-65, Mar., 2008, Taoyan, Taiwan.
  281. Mu-Chun Wang, Kuo-Su Huang, and Shiang-Lin Yang,” Analysis and Improvement of CDM/ESD Immunity in Back- End Assembly Process,” 2008 International Academic Conference at Ming-Chuan University, Electronic Group, pp.54-59., Mar., 2008, Taoyan, Taiwan.
  282. Mu-Chun Wang, Zhen-Ying Hsieh, Wu-Chieh Wen, Tung-Hsien Lee, Heng-Sheng Huang, Sam Chou, “A Study of Thermal Voltage Enhancing Substrate Current in NMOSFETs with 90nm CMOS Process,” 2007 International Electron Devices and Materials Symposia (IEDMS), PA-9, pp.1-3, Nov., Hsinchu, Taiwan.
  283. Mu-Chun Wang, Zhen-Ying Hsieh, Ming-Hsien Weng, Wen-Kuo Yeh, and Hsing-Yuan Chu, “A Metrology to Expose AA Shift with Improved Kelvin Measurement for 110nm Trench DRAM,” 2007 International Electron Devices and Materials Symposia (IEDMS), A2-5, pp.1-3, Nov., Hsinchu, Taiwan.
  284. S. Y. Chen, A. R. Chuang, C. H. Tu, M. H. Lin, Z. Y. Hsieh, M. C. Wang, S. H. Wu, S. Jhou, J. Ko, and H. S. Haung, “The Comparison of the Worst Test Condition on NBTI and Hot-Carrier Reliability for 0.13 μm MOSFETs,” 2007 International Electron Devices and Materials Symposia (IEDMS), PC-18, pp.1-4, Nov. 2007, Hsinchu, Taiwan.
  285. C. H. Tu, S. Y. Chen, M. H. Lin, Z. Y. Hsieh, M. C. Wang, S. H. Wu, S. Jhou, J. Ko, and H. S. Haung, “The Switch of the Worst Case on NBTI and Hot Carrier Reliability for 0.13 um PMOSFETs, “5th International Symposium on Control of Semiconductor Interfaces (ISCSI-V), pp207-208, Nov. 2007, Takyo, Japan.
  286. Mu-Chun Wang, Ming-Hsien Weng, Zhen-Ying Hsieh, Chiao-Hao Tu, Shuang-Yuan Chen, Heng-Sheng Huang, Wen-Kuo Yeh, and Hsing-Yuan Chu, “A Metrology to Explore Collar TEOS Integrity of Deep-Submicron DT DRAM Capacitor with a Vertical Parasitic NMOSFET,” 1st IEEE-NANOMED Conference, Aug. 6-9, 2007, Macau, China.
  287. 王木俊、翁銘賢、謝禎穎、李東憲、溫武傑、葉文國、車行遠, “Kelvin量測方式以驗證深次微米DRAM製程中之DT-AA偏移量,” 2007 第五屆微電子技術發展與應用研討會, 系統元件組, 五月, 2007, 高雄 台灣. (Chinese version)
  288. 王木俊、翁銘賢、謝禎穎、李東憲、溫武傑、葉文國、車行遠, “利用側壁垂直寄生BJT電晶體電流增益值之變化作為DRAM深溝槽電容頸區漏電與襯墊氧化層品質之檢測,” 2007 第五屆微電子技術發展與應用研討會, 系統元件組, 五月, 2007, 高雄 台灣. (Chinese version)
  289. 王木俊、李東憲、謝禎穎、翁銘賢、溫武傑、陳雙源、周昇元、黃恆盛, “90奈米製程N-型MOS電晶體在不同氧化層厚度下基底電流對溫度變化之分析,” 2007 第五屆微電子技術發展與應用研討會, 系統元件組, 五月, 2007, 高雄 台灣. (Chinese version)
  290. 王木俊、何紹民、謝禎穎、陳雙源、涂家豪、蕭學鈞, “源/汲極離子佈植能量對快閃記憶體寫入速度之研究,” 2007 第五屆微電子技術發展與應用研討會, 系統元件組, 五月, 2007, 高雄 台灣. (Chinese version)
  291. 陳雙源、何紹民、涂家豪、謝禎穎、王木俊、吳思漢、周昇元, “PMOSFET在DAHC、CHC及NBTI應力下最劣化之研究,” 2007 第五屆微電子技術發展與應用研討會, 系統元件組, 五月, 2007, 高雄 台灣. (Chinese version)
  292. Mu-Chun Wang, Wu-Chieh Wen, Tung-Hsien Lee, Ming-Hsien Weng, Ching-Sheng Yang, Chia-Hung Lin, and Cheng-Yi Liu,” Defects of AA Layer Analysis and Improvement in Deep-submicron DRAM Process,” 2007 International Academic Conference at Ming-Chuan University, Electronic Group, pp.100-107, Mar., 2007, Taoyan, Taiwan.
  293. Mu-Chun Wang, Zhen-Ying Hsieh, Shuang-Yuan Chen, Heng-Sheng Huang,” Investigation of Contribution Ratio between NBTI and HC Effects in PMOSFETs under Deep-Submicron Process,” 2007 ASME/ International Conference on Integration and Commercialization of Micro and Nano-systems, Micro and Nano Devices, MNC-2007_21082, Jan. 2007, Sanya China.
  294. K. C. Chen, W. C. Lin, J. C. Lin, S. Y. Chen, C. H. Liu, P.W. Kao, M. C. Wang, and H. S. Huang,” Comprehensive Study of Pocket Implant Angles on Digital and Analog Performances of 90 nm Technology Node MOSFETs,” 2006 International Electron Devices and Materials Symposia (IEDMS), PD080, pp.467-469, Dec., Tainan Taiwan
  295. Shuang-Yuan Chen, Meng-Hong Lin, Jung-Chun Lin, Po-Wei Kao, Ze-Wei Jhou, Mu-Chun Wang, and Heng-Sheng Huang,” The Switches of the Worst Hot Carrier Degradation Conditions for pMOSFETs,” 2006 International Electron Devices and Materials Symposia (IEDMS), PD087, pp.486-488, Dec. 2006, Tainan Taiwan
  296. Mu-Chun Wang, Yung-Chen Chen , Shuang-Yuan Chen, Heng-Sheng Huang, “ECR Plasma-Enhanced Au/Al Bondability in Fine-Pad-Pitch BGA Assembly,” 1st IEEE conference on IMPACT, pp.193-196, Oct. , 2006, Taipei, Taiwan.
  297. 王木俊、郭威忠、李東憲、葉文國、車行遠, “0.11微米DRAM製程中之溝槽式ONO 細胞電容器在高溫操作下之品質研究,” 2006 第四屆微電子技術發展與應用研討會, 系統元件組, 五月, 2006, 高雄 台灣. (Chinese version)
  298. 王木俊、劉智銓、謝禎穎、徐見英、翁銘賢, “藉著韋伯與對數常態機率分佈以探討TDDB生命期萃取法,” 2006 第四屆微電子技術發展與應用研討會, 半導體材料組, 五月, 2006, 高雄 台灣. (Chinese version)
  299. Mu-Chun Wang, Zhen-Ying Hsieh, Chih-Chuan Liu, Wei-Chung Kuo, and Shyng Yeuan Che,” Subthreshold Swing for Threshold Voltage Measurement,” 2006 International Academic Conference at Ming-Chuan University, Electronic Group, pp.38-43, Mar., 2006, Taiwan.
  300. Mu-Chun Wang, Yu-Jie Liao, Chiung-Lung Chang, Guang-Yi Yeh, and Forest Shen, “Distinction of Contribution Ratio in NBTI and HC Effects of PMOSFETs under Deep-submicron Process,” 2005 International Academic Conference at Ming-Chuan University, Electronic Group, pp12-19, Mar., 2005, Taiwan.
  301. M.-D. Ker, K.-K. Hung, H. Tang, S.-C. Huang, S.-S. Chen, and M.-C. Wang, “Novel diode structures and ESD protection circuits in a 1.8-V 0.15-μm partially-depleted SOI salicided CMOS process,”2001 International Symposium on Physics and Failure Analysis of Integrated Circuits (IPFA), pp91-96, Singapore, July 2001
  302. Howard T.H. Tang, S.C. Huang, S.S. Chen, L.S. Huang, M.C. Wang, and Y.T. Loh, “A Novel Deep-Submicron ESD Design Margin with TLP Experimental Verification”, 29th Proceedings Electrostatics Society of America (ESA) Annual Meeting 2001, pp239-244, June 2001.
  303. M.-D. Ker, K.-K. Hong, T.-Y. Chen, H. Tang, S.-C. Huang, S.-S. Chen, C.-T. Huang, M.-C. Wang, and Y.-T. Loh, “Investigation on ESD robustness of CMOS devices in a 1.8-V 0.15-μm partially-depleted SOI salicide CMOS technology”, IEEE/ 2001 International Symposium on VLSI Technologies, Systems and Applications, Taiwan, pp41-44, Apr. 2001.
  304. M.-D. Ker, W.-Y. Lo, T.-Y. Chen, H. Tang, S.-S. Chen, and M.-C. Wang, “Compact layout rule extraction for latchup prevention in a 0.25-μm shallow-trench-isolation silicided bulk CMOS process”, IEEE/ 2001 International Symposium on Quality Electronic Design (ISQED), San Jose, CA. USA, pp267-272, Mar. 2001.
  305. M.C. Chen, C.W. Wu, C.W. Tsai, and T. Wang; Y.C. Liu, L.S. Huang, M.C. Wang, and L.C. Hsia, “Stress Induced Gate-Width Edge Effects in STI pMOSFETs”, 2000 International Electron Devices and Materials Symposia, pp50-53, Dec. 2000.
  306. Y.Y. Lin, S.C. Kao, L.S. Huang, M.C. Wang, L.C. Hsia, “Investigation of Oxygen Plasma Characteristics to Optimize SOI Wafer Fabrication”, 2000 International Electron Devices and Materials Symposia (IEDMS), pp141-144, Dec. 2000.
  307. S. Huang-Lu, C.T. Huang, T. Lin, S.C. Kao, M.T. Lee, J. Wang, Y.C. Sheng, M.C. Wang, and L.C. Hsia, “ The process Impact on Negative Bias Temperature Instability (NBTI) of p+ Polysilicon gate PMOS”, 2000 International Electron Devices and Materials Symposia, pp86-89, Dec. 2000.
  308. Howard T.H. Tang, S.S. Chen, S.C. Huang, Chen-Wei Lee, Sam Chou, M.C. Wang, and L.C. Hsia, “Promotion of ESD Robustness with PESD Implant in Deep Submicron Process”, 2000 International Electron Devices and Materials Symposia (IEDMS), pp78-81, Dec. 2000.
  309. C.W. Tsai, S.H. Gu, L.P. Chiang, Tahui Wang; Y.C. Liu, L.S. Huang, M.C. Wang, and L.C. Hsia, “Valence-Band Tunneling Enhanced Hot Carrier Degradation in Ultra-Thin Oxide nMOSFETs”, IEEE/ 2000 International Electron Devices and Materials (IEDM), Session 6, Dec. 2000.
  310. S. Huang-Lu, C.T. Huang, T. Lin, S.C. Kao, M.T. Lee, J. Wang, Y.C. Sheng, M.C. Wang, and L.C. Hsia, “Negative Bias Temperature Instability (NBTI) of p+ Polysilicon Gate PMOS due to p-LDD Contribution”, 2000 Microelectronics Reliability and Qualification Workshop, ppVI.7, Oct. 2000.
  311. C. J. Huang, Y. C. Liu, S. F. Hong, Auter Wu, M. C. Wang, Sungmu Hsu, L. C. Hsia, Y. J. Chang, Y. T. Lo, and Fu-Tai Liu “A Novel p-channel Flash EEPROM Cell with Simple Process and Low Power Consumption”, 2000 Solid State Devices and Materials (SSDM), C5, pp278-279, Aug. 2000.
  312. Howard Tang, S.S. Chen, Scott Liu, M. Lee, C.H. Liu, M.C. Wang, and L.C. Hsia, “An ESD Solution with Cascode Structure for Deep-Submicron IC Technology”, 28th Proceedings Electrostatics Society of America (ESA) Annual Meeting 2000, pp204-209, June 2000.
  313. L.P. Chiang, C.W. Tsai, T. Wang; U.C. Liu, M.C. Wang, and L.C. Hsia, “Auger Recombination Enhanced Hot Carrier Degradation in nMOSFETs with Positive Substrate Bias”, IEEE/ 2000 Symposium on VLSI Technology, pp132-133, June 2000.
  314. C.H. Liu, Tun-Jen Cheng, Mu-Chun Wang, Yang, S.H., Fu, K.Y. , “Modeling and Correlation of Gate Oxide Q/sub BD/ between Exponential Current Ramp and Constant Current Stresses”, IEEE/ 1999 International Symposium on VLSI Technologies, Systems and Applications, Taiwan, pp 94-95, June 1999.

 

[Others]

  1. 王木俊, “生命改變享受無限” 2016全國大專基督徒教職員事工研討會, pp.82-84, 苗栗/西湖渡假村, July 31-Aug. 02, 2016. (Chinese version)

 

【Technical Reports in Chinese】

 

【Cooperation partners】: UMC and NTUT

  1. Mu-Chun Wang, “Investigation of ultra-gate oxide characterization and establishment of device reliability metrology in deep-submicron processes,” published by Kao-Li Company, July 2005, ISBN:986-412-262-2. (http://www.gau-lih.com.tw)
  2. 王木俊/黃恆盛, “在奈米製程下，銅金屬導線之電子遷移與肌膚效應結合後，在射頻頻率範圍操作中，共伴效應之研究,” 國科會計劃結案報告(計劃編號: 96-2221-E-159-017) ，2008年 9月(Chinese version)

 

【Others】

< Patents in Taiwan and USA>

 

Item

國別

發明名稱

獲權日

專利號

1

美

Method of testing a transistor

2000/4/18

6,051,986

2

中

電晶體檢測方法

1999/7/1

105875

3

中

短通道元件

2001/4/11

130,147

4

中

監測天線效應之結構

2000/1/11

111447

5

美

Structure of an antenna effect monitor

1999/9/28

5,959,311

6

中

感測不對稱天線效應的電路設計

1999/12/1

109681

7

美

Circuit for evaluating an asysmetric antenna effect

2001/5/8

6,229,347

8

中

避免互補式金氧半導體的井對閘極氧化層造成損害的方法

2000/2/1

111435

9

美

Method for preventing damage to gate oxide from well in complementary metal-oxide semiconductor

2000/5/9

6,060,347

10

中

辨識金屬電漿效應的方法

2001/6/16

135395

11

中

閘氧化層良率統計方法

2000/5/11

114778

12

美

Statistical method of monitoring gate oxide layer yield

2001/9/11

6,289,291

13

美

Reliability testing method of dielectric thin film

2001/7/31

6,269,315

14

中

保護閘極氧化層及檢測閘極氧化層損傷的方法

2000/7/1

117076

15

美

Method for protecting gate oxide layer and monitoring damage

2001/9/18

6,291,285

16

中

半導體元件的製造方法

2000/9/1

120056

17

中

保護閘極氧化層的方法

2001/6/16

135406

18

美

Method of protecting gate oxide

2001/8/14

6,274,494

19

中

晶圓的測試方法及其測試鍵之結構

2001/5/16

132318

20

美

Wafer acceptance testing method and structure of a test key used in the method

2001/2/20

6,191,602

21

美

Method of preventing damages of gate oxides of a semiconductor wafer in a plasma-related process

2000/12/12

6,159,864

22

中

一種防止一半導體晶片之閘極氧化墊於一電漿製程中受光學或粒子因波動現象而造成之損害的方法

2000/8/1

119353

23

中

監測ppid效應的量測方法

2001/3/21

129258

24

中

降低銲墊阻值的銲墊製造方法

2001/3/21

129270

25

中

作為靜電放電防護之互補式金氧半導體(CMOS)矽調節整流器(SCR)的結構

2001/5/25

133,728

26

中

具有共放電線之靜電放電防護電路

2001/11/11

144,074

 

 

 

 

Item

國別

發明名稱

獲權日

專利號

27

美

Electrostatic discharge protective circuitry equipped with a common discharge line

2005/3/29

6,873,505

28

美

Low triggering voltage soi silicon-control-rectifier (scr) structure

2001/6/5

6,242,763

29

中

具有低引發電壓矽調整流器之絕緣層上有矽的結構

2001/5/1

132,801

30

中

保護元件及其製造方法

2001/4/11

130,444

31

美

Method of fabricating protection structure

2001/9/18

6,291,281

32

美

Method of protecting a well at a floating stage

2001/6/12

6,245,610

33

中

浮置井的保護方式及結構

2001/4/1

129593

34

中

降低電漿損壞的方法

2001/4/21

131,282

35

美

Method for reducing plasma charging damages

2001/5/22

6,235,642

36

美

Method for avoiding plasma damage

2000/8/29

6,110,841

37

中

改善電漿損害的方法

2001/4/11

130,341

38

中

用以連接不同金屬層之介層窗插塞的配置架構

2001/5/16

132,346

39

美

Via-plug layout structure for connecting different metallic layers

2002/11/19

6,483,045

40

中

靜電放電保護結構及其製造方法

2003/5/21

178,232

41

美

Electrostatic discharge protection structure and a method for forming the  same        

2005/4/12

6,878,581

42

中

保護層的製造方法

2002/1/1

148,105

43

中

用於量測內層介電層介電常數及極性效應的半導體結構

2002/1/1

148,539

44

中

防範蓄積電漿損壞的半導體元件

2001/10/11

142485

45

中

防範製程引發蓄積電荷損壞的半導體元件

2002/1/21

149526

46

美

Semiconductor device for preventing process-induced charging damages

2002/9/10

6,448,599

47

美

Method of determing integrity of a gate dielectric

2003/6/24

6,583,641

48

中

閘極介電層崩潰的測試方法

2002/10/11

164099

49

中

護環結構

2002/8/1

160270

50

美

Cross guard-ring structure to protect the chip crack in low dielectric constant and copper process

2002/9/24

6,455,910

51

中

一種護環結構

2002/5/1

155913

52

美

CMOS silicon-control-rectifier (SCR) structure for electrostatic discharge (ESD) protection

2007/5/15

7217980B2

53

中

真空排氣抗噪系統

2020/12/1

M604966

 

< Sidebar >

  1. Sidebar for Tim Tuner’s paper “Requirements for Dual-damascene Cu-linewidth Resistivity Measurements”, Solid State Technology, pp 89-96 , May 2000

 

【Paper or Project Reviewer】

  1. IEEE Transaction on Device and Materials Reliability, 2007/2008/2012, paper reviewer
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  106. Elsevier/ Microelectronic Engineering, 2018/08, paper reviewer
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  114. Elsevier/ Microelectronics Journal, 2019/01, paper reviewer
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  121. MDPI system/ Sensors, 2019/04, paper reviewer
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  123. MDPI system/ Electronics, 2019/06, paper reviewer
  124. Elsevier/ Solid State Electronics, 2019/7, paper reviewer
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  222. NCSIST/ Ministry of Defense,”Power Electronics RF Industry Application Development Plan (1/4）”, 2023/01/18, project audit committee. 
  223. MDPI system/ Algorithms, 2023/01, paper reviewer (Emerging Sources Citation Index (ESCI) in JCR)
  224. MDPI system/ Electronics, 2023/02/04, paper reviewer
  225. MDPI system/ Bioengineering, 2023/02/17, paper reviewer (SCI IF2021: 6.09)
  226. MDPI system/ Sensors, 2023/02/28, paper reviewer
  227. OJS system/ J. Electr. Electron. Eng. (JEEE), 2023/03/01, paper reviewer
  228. NCSIST/ Ministry of Defense,”Power Electronics RF Industry Application Development Plan (2/4）”, 2023/03/07, written review committee.
  229. MDPI system/ Nanomaterials, 2023/03/11, paper reviewer
  230. MDPI system/ Sensors, 2023/03/23, paper reviewer
  231. Sensors and Materials (Materials, Devices, Circuits, and Analytical Methods for Various Sensors) 2023/03~ 2024/04 ((SCI IF2021: 0.879) Guest editor)
  232. MDPI system/ Electronics, 2023/04/07, paper reviewer
  233. MDPI system/ Micromachines, 2023/04/12, paper reviewer
  234. MDPI system/ Sensors, 2023/04/25, paper reviewer
  235. EnPress Publisher/ Characterization and Application of Nanomaterials, 2023/04/26, paper reviewer
  236. MDPI system/ Fibers, 2023/05/10, paper reviewer
  237. EnPress Publisher/ Characterization and Application of Nanomaterials, 2023/05/09, paper reviewer
  238. MDPI system/ Micromachines, 2023/05/24, paper reviewer
  239. MDPI system/ Electronics, 2023/06/15, paper reviewer
  240. MDPI system/ Computers, 2023/06/26, paper reviewer
  241. IEEE system/ Journal of the Electron Devices Society, 2023/07/17, paper reviewer
  242. MDPI system/ Energies, 2023/07/20, paper reviewer
  243. 2023 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2023), 2023/07, paper reviewer
  244. MDPI system/ Membranes, 2023/08/02, paper reviewer
  245. MDPI system/ Sensors, 2023/08/10, paper reviewer
  246. MDPI system/ Chips, 2023/08/15, paper reviewer
  247. NCSIST/ Ministry of Defense,” Application Development of Power Electronics RF Industry (1/4）”, 2023/08/17, Midterm Verification Review Committee.
  248. MDPI system/ Energies, 2023/08/27, paper reviewer
  249. MDPI system/ Biomimetics, 2023/09/07, paper reviewer (SCI IF2022:4.5)
  250. SpringerNature/ Silicon, 2023/09/14, paper reviewer
  251. Elsevier/ Journal of Materials Research and Technology, 2023/10/02, paper reviewer
  252. MDPI system/ Sensors, 2023/10/10, paper reviewer
  253. MDPI system/ Electronics, 2023/10/26, paper reviewer
  254. Elsevier/ Journal of Materials Research and Technology, 2023/11/06, paper reviewer
  255. Elsevier/ Journal of Materials Research and Technology, 2023/11/27, paper reviewer
  256. MDPI system/ Micromachines, 2023/12/06, paper reviewer
  257. MDPI system/ Biosensors, 2024/01/31, paper reviewer
  258. Elsevier/ Microelectronics Journal, 2024/02/05, paper reviewer
  259. MDPI system/ Micromachines, 2024/02/15, paper reviewer
  260. MDPI system/ Micromachines, 2024/02/29, paper reviewer
  261. Elsevier/ Micro and Nanostructures, 2024/03/11, paper reviewer
  262. MDPI/ Molecules (Opportunities and Challenges in Organic Optoelectronic Materials) Guest editor (SCI IF2024:4.2) 2025/01~ 2025/12

 

(Paper review for 62 international journals (including 46 SCI journals); paper review committee for 24 international conferences; 10 Guest editors for journals (including 7 SCI journals)

 

【Conference Session Chairman & Committee】

  1. 2009/ 2004 (Cross Strait Tri-regional Radio Science and Wireless Technology Conference, CSTRWC), session chair, Tianjin, China
  2. 2009/ CSTRWC, Best paper reviewer
  3. 2004/ 2006/ 2008 International Conference in Ming Chuan Univ., session chair
  4. 2008 International Electron Devices and Materials Symposia (IEDMS), session chair, Taichung, Taiwan
  5. 2008 International Electron Devices and Materials Symposia, IEDMS 2008/ Session A; Oral Best Paper reviewer
  6. 2009 The sixth Asia-Pacific International Symposium on the Basic and Application of Plasma Technology (APSPT-6), Session A2 (session chair)
  7. 4th IEEE International NanoElectronics Conference (INEC2011), Session G5 (session chair), Taoyuan, Taiwan
  8. 2011Electrical and information application conference at Vanung Univ. (session chair)
  9. 2012 International Conference on Commercialization of Transducer & MEMS, session chair and invited speaker, 2012/9. (Suzhou, China)
  10. 8th Asia-Pacific International Symposium on the Basics and Applications of Plasma Technology (APSPT-8, 2013/12), Session 18 (session chair) and Poster Award Competition, Hsinchu, Taiwan.
  11. 8th Asia-Pacific International Symposium on the Basics and Applications of Plasma Technology (APSPT-8, 2013/12) (Local Committee)
  12. 3rd IEEE International Symposium on Next-Generation Electronics (ISNE2014), Session YA2 (session chair), Taoyuan, Taiwan.
  13. 2014 International Electron Devices and Materials Symposia, IEDMS 2014, Session FET I (session chair), Hualien, Taiwan.
  14. The International Conference on Mechatronics and Manufacturing Technologies [MMT2016], Wuhan, China (Technical Program of Committee). 2016/8.
  15. 2016 International Electron Devices and Materials Symposia [IEDMS 2016], (Technical Program of Committee). 2016/11, Taipei, Taiwan.
  16. 2016 International Electron Devices and Materials Symposia [IEDMS 2016], Session B2, 2016/11, Taipei, Taiwan.
  17. 2016 International Conference on Computer, Networks and Communication Technology [CNCT2016], (Technical Program of Committee), 2016/12, Xiamen, China
  18. 2016 International Conference on Economics, Management and Social Development [EMSD 2016], (Technical Program of Committee), 2016/12, Zhangjiajie, China
  19. 3rd International Conference on Wireless Communication and Sensor Network (WCSN 2016), (Technical Program of Committee), 2016/12, Wuhan, China
  20. 2017 International Conference on Advanced Material Science and Engineering [AMSE2017], (Technical Program of Committee), 2017/2, Shenzhen, China
  21. Mechanical Engineering and Materials -- MEM2017, (Technical Program of Committee), 2017/ 6, Xiamen, China
  22. International Conference on Electronic Industry and Automation-- EIA2017, (Technical Program of Committee), 2017/6, Suzhou, China
  23. International Conference on Cloud Technology and Communication Engineering-- CTCE2017, (Technical Program of Committee), 2017/8, Guilin, China
  24. 3rd Annual International Conference on Advanced Material Engineering-- AME2017, (Technical Program of Committee and co-editor), 2017/4, Shanghai, China
  25. 3rd Annual International Conference on Electronics, Electrical Engineering and Information Science-- EEEIS2017, (Technical Program of Committee), 2017/09, Guangzhou, Guangdong, China
  26. 4th annual International Conference on Information Technology and Applications-- ITA 2017, (Technical Program of Committee), 2017/05, Guangzhou, Guangdong, China
  27. 4th annual 2017 International Conference on Design, Manufacturing and Mechatronics-- (ICDMM2017), (Technical Program of Committee), 2017/5, Guangzhou, Guangdong, Chin
  28. 2017 International Conference on Wireless Communications, Networking and Applications—(WCNA 2017), (Technical Program of Committee, keynote speaker, and Chair), 2017/10, Shenzhen, China.
  29. 2017 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2017), (Technical Program of Committee and Program Chair), 2017/8, Busan, Korea [organized by IASED (International Academy of Science and Engineering for Development, www.iased.net)]
  30. 3rd Annual 2017 International Workshop on Material Science and Engineering --- (IWMSE 2017), (Technical Program of Committee), 2017/9, Guangzhou, Guangdong, China
  31. 2018 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2018), (Technical Program of Committee), 2018/5, Beijing, China.
  32. International Conference on Earth Observations and Societal Impacts, 2018 (ICEO&SI 2018), July 2018 (Session C-5, session chair)
  33. 2018 the 2nd annual conference on Cloud Technology and Communication Engineering (CTCE2018), (Technical Program of Committee), 2018/08, Nanjing, China.
  34. 5th International Conference on Wireless Communication and Sensor Network (WCSN 2018), (Technical Program of Committee and editor), 2018/12, Wuhan, China
  35. 2018 2nd International Workshop on Materials Science and Mechanical Engineering (2nd IWMSME2018), (Technical Program of Committee), 2018/10, Qingdao, Shandong Province, China.
  36. 2019 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2019), (Technical Program of Committee and Program Chair), Shanghai, China on 26-28 April, 2019.
  37. 2019 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2019), (Co-editor), Shanghai, China on 26-28 April, 2019.
  38. 2nd Annual International Conference on Control, Automation and Electrical Systems (ICCAES2019), 2019/04, Wuhan, China. (Technical Program of Committee)
  39. 7th Annual International Conference on Material Science and Engineering (ICMSE2019) April 19-20, 2019 / Wuhan, Hubei, China. (Technical Program of Committee)
  40. IEEE/ 26th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA2019)- Hangzhou, China, July 02-05, 2019 (Invited speaker).
  41. IEEE/ 26th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA2019)- Hangzhou, China, July 02-05, 2019 (Best paper reviewer).
  42. International Congress on Advanced Materials Sciences and Engineering (ICAMSE-2019) - Osaka, Japan, July 22-24, 2019 (Invited speaker, session 8: Nano materials)
  43. International Congress on Advanced Materials Sciences and Engineering (ICAMSE-2019) - Osaka, Japan, July 22-24, 2019 (session chair, session 8: Nano materials)
  44. The 8th IEEE International Symposium on Next-Generation Electronics (ISNE 2019)- Zhengzhou, China, Oct.9-10, 2019 (Invited speaker)
  45. The 8th IEEE International Symposium on Next-Generation Electronics (ISNE 2019)- Zhengzhou, China, Oct.9-10, 2019 (Technical Program of Committee)
  46. The 8th IEEE International Symposium on Next-Generation Electronics (ISNE 2019)- Zhengzhou, China, Oct.9-10, 2019 (Session chair: Session 7 Semiconductor Technology)
  47. 2019年度「台灣精密工程科技研討會Taiwan Precision Technology Workshop, TPTW2019), Nov. 28, 2019 (竹北 喜來登飯店) Session chair (Chinese conference)
  48. 2020 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2020), (Program Chair), 20-22 July, 2020, Seoul, Korea.
  49. 2020 7th International Conference on Manufacturing and Industrial Technologies (ICMIT 2020), July 22-24, 2020, Rome, Italy (Technical Program of Committee)
  50. IEEE/ The 2nd International Conference on Circuits and Systems (ICCS2020), October 16-19, 2020, Chengdu, China (Technical Program of Committee)
  51. 2020 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2020), (On-line session chair), 20-22 July, 2020, Seoul, Korea.
  52. 2021 8th International Conference on Manufacturing and Industrial Technologies (ICMIT 2021), July 26-28, 2021, Lisbon, Portugal (Technical Program of Committee)
  53. 2021 9th Annual International Conference on Material Science and Engineering (ICMSE 2021), July 23-25, 2021, Guiyang, Guizhou, China (Technical Program of Committee)
  54. 2021 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2021), (Technical Committee Chair), 15-17, Oct. 2021, Singapore.
  55. Materials Science Forum, (Scientific Committee Chair for MEAMT2020 proceedings), Jan. 2021.
  56. 2021 2nd International conference on Industrial Engineering and Artificial Intelligence (IEAI 2021), Apr. 2-4, 2021, Osaka, Japan (Technical Program of Committee)
  57. 9th IEEE International Symposium on Next-Generation Electronics (ISNE 2021), July 10-12, 2021, Changsha, China (On-line invited speaker)
  58. 8th Annual International Conference on Information Technology and Applications (ITA2021), Sept. 17-19, Xiamen, Fujian, China
  59. 2022 3rd International conference on Industrial Engineering and Artificial Intelligence (IEAI 2022), Apr. 28-30, 2022, Chiang Mai, Thailand (Technical Program of Committee)
  60. 2021 明新科技大學 工程科技技術應用研討會 Dec. 17, 2021 (MUST/ Hsimchu) Session chair
  61. 2022 International Conference on Science, Education, and Viable Engineering (IEEE IC7), June. 23-26, 2022, Yilan, Taiwan (Session chair)
  62. 2022 明新科技大學 工程科技技術應用研討會 Dec. 02, 2022 (MUST/ Hsimchu) Session chair
  63. 2023 7th International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2023), (Technical Committee Chair), Aug. 25-27, 2023, Taizhou, China.
  64. 2023 7th International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2023), (Technical Committee), Aug. 25-27, 2023, Taizhou, China.
  65. 2023 11th IEEE & 12th ICSEVEN, (Technical Program Committee), Osaka, Japan on Apr. 12-16, 2023.
  66. 2023 International Conference on Smart Materials and Surfaces (ICoSMS 2023), (Program Chair), July 21-23, 2023, Taizhou, China.
  67. 2023 12th IEEE & 13th ICSEVEN, (Technical Program Committee), Bangkok, Thailand on Nov. 8-12, 2023.
  68. 2023 12th IEEE & 13th ICSEVEN, Bangkok, Thailand on Nov. 8-12, 2023, Session chair

 

(22 session chairs; 4 program chairs & 2 Technical Committee Chair; 34 TPCs; 3 Editor or co-editor; 5 invited speakers)

 

【Teaching Performance】

  1. Minghsin University of Science and Technology (MUST), student teaching evaluation in recent years: the total average is greater than 4.2 (Full marks: 5.0). 
  2. National Taipei University of Technology (NTUT), student teaching evaluation around 12 years: the total average is greater than 4.5 (Full marks: 5.0).
  3. National Chiao Tung University Talent Cultivation Center，2007/9-10 Student opinion survey: total average: 4.5 (Full marks: 5.0).
  4. Sponsored by Minghsin University of Science and Technology and the Ministry of Education as the guiding unit, the national "RFID Design and Application Competition", the team led by the job office respectively used "Design S-type antennas for 2.4GHz RFID transceivers" and "5.2GHz single-stage stacked super Low Noise Amplifier Applied in Wireless Identification System" won the second and third place in the design competition group, 2008/12/20.
  5. Graduate Institute of Electronics/ MUST, “Device Measurement and Reliability Analysis” Taught in English, Fall 2007 and Fall 2008.
  6. Graduate Institute of Electronics/ MUST, “Principles of Flat Panel Display” Taught in English, Spring 2009.
  7. Graduate Institute of Electronics/ MUST, “Semiconductor Device Physics” Taught in English, Fall 2009.
  8. CSTRWC09, “First-Stage Cascode Ultra-Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID Applications” and “A High Power-added Efficiency of Power Amplifier for 2.4GHz RFID Applications Embedded with 0.18um CMOS Process”, Won the Excellent Paper Awards.
  9. 2009 IEEE/IMPACT, “Analysis of Promising Copper Wire Bonding in Assembly Consideration”, One of the 6 shortlisted candidates for the "Best Student Paper Award".
  10. 2010 Co-directed the doctoral program of the Graduate Institute of Graduate Institute of Mechatronic Engineering of NTUT (Dr. Zhen-Ying Hsieh), during 4 years, papers published over 100.
  11. Graduate Institute of Electronics/ MUST, “IC Measurement and Reliability Analysis” Taught in English, Spring 2010.
  12. Graduate Institute of Mechatronic Engineering/ NTUT, “Nano-silicon Physics” Taught in English, Spring 2010.
  13. Graduate Institute of Mechatronic Engineering/ NTUT, “Nano-silicon Physics” Taught in English, Spring 2011.
  14. Graduate Institute of Mechatronic Engineering/ NTUT, “Nano-silicon Physics” Taught in English, Spring 2012.
  15. 2011年 電子系二技彭敏茹、何耀元、羅伊呈、彭沂昕專題指導，論文發表 每個人皆有5篇或以上論文(包括每個人皆有 1篇IEEE 論文).
  16. 2011年 電子系二技 研究所甄試: 彭敏茹(台北科大/機電所)、何耀元(元智大學/光電所)、羅伊呈(長庚大學/電子所).
  17. 2011年 明新科大/日電子研究所 楊人澔，論文發表 20篇 ( 2 EI paper, 5 IEEE conference, 3 APICOR, 1 IEDMS, 9 國內研討會論文) ，並獲得2011年明新科大「畢業傑出成就獎」.
  18. 台北科技大學機電整合研究所，「CMOS Device measurement and Reliability Engineering」全英文式授課，2013春季.
  19. 2013年 明新科大/日電子研究所 杜重寬、吳國維、張敬宗與彭思豪，論文發表皆超過 10篇 ，並獲得2013年明新科大/電子所「畢業傑出研究獎」；王志玄 論文發表 3篇 (2篇IEEE/NMDC2013 與1篇APWS2013) ，獲得2013年明新科大/電子所「畢業優秀研究獎」.
  20. 台北科技大學機電整合研究所，「CMOS Device measurement and Reliability Engineering」全英文式授課，2014春季.
  21. 2014年 明新科大/日電子研究所 楊捷閩、李朝旺、與連俊瑋，論文發表皆超過 10篇 ，並獲得2014年明新科大/電子所「畢業傑出研究獎」.
  22. 2015年 明新科大/日電子研究所 林建良 論文發表 5篇與賴益得論文發表 3篇.
  23. 2016年明新科大/日電子研究所 田振威 王昱崴 論文發表各 7篇
  24. 2016年 明新科大/日 大學部 游一宏: 論文發表 8篇.
  25. 2017年明新科大/日電子研究所 饒子揚 論文發表15篇 電子所「畢業傑出研究獎」
  26. 2017電子,信號,與通訊創新科技研討會: 黃文敭、張耀文、趙廷唯、王木俊, “溫度調變下不同p通道鰭式電晶體之DIBL變化”, 國立高雄應用科技大學, 高雄, 5月 2017. (優秀論文獎)
  27. 2018年明新科大/日電子研究所 趙廷唯 論文發表11篇
  28. 2020年明新科大/日電子研究所 陳建銘 論文發表12篇
  29. NTHU/ TCFST teaching，student teaching evaluation : the grade is 92; in Mar., 2021. (Full marks: 100).
  30. Full English teaching for undergraduate students at MUST with “Integrated Circuit Engineering” in Fall, 2021.
  31. Full English teaching for undergraduate students at MUST with “Semiconductor Process Technology” in Spring, 2022.
  32. Full English teaching for graduate students at MUST with “IC Measurement and Reliability Analysis” in Spring, 2023.

 

【Awards or Special Honors】

  1. 明新科大主辦暨教育部為指導單位，全國「RFID設計與應用競賽」，職所帶領之團隊分別以「設計S型天線應用在2.4GHz RFID收發器」與「5.2GHz單級疊接式超低雜訊放大器應用於無線辨識系統」於設計競賽組，獲得第二名與第三名之佳績，2008/12/20.
  2. 2009兩岸三地無線電研討會 (CSTRWC09) (於天津大學) 兩篇論文「First-Stage Cascode Ultra-Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID Applications」與「A High Power-added Efficiency of Power Amplifier for 2.4GHz RFID Applications Embedded with 0.18um CMOS Process」榮獲優秀論文獎
  3. 2009 IEEE/IMPACT 「Analysis of Promising Copper Wire Bonding in Assembly Consideration」入圍「最佳學生論文獎」候選名單6篇中之一
  4. Obtained Minghsin Univ. of Science and Technology / Distinguished Teaching Award in 2010.
  5. 2011榮獲中華民國私立教育事業協會/ 模範教師獎 (100)教協安字第100024號
  6. 2011謝禎穎 榮獲明新科技大學/ 100 學年度「熱心優良校友」
  7. ITRI/ Excellent Teaching Award in 2011
  8. 2012 義守大學/ 電子工程技術研討會_優秀論文 (0.18微米製程5.2/5.8GHz高增益與絕佳隔離之疊接式低雜訊放大器應用於射頻鑑別系統)
  9. 國立臺灣科技大學所舉辦之101年度『半導體及光電設備領域』優良教材競賽 獲得特優獎 (作品:光電平面顯示器概論)
  10. 2012榮獲中華民國私立教育事業協會/ 模範教師獎 (101)教協安字第101071號
  11. Keynote speaker: 2012 International Conference on Commercialization of Transducer & MEMS, 2012/9. (Suzhou, China)
  12. Obtained Minghsin Univ. of Science and Technology / Distinguished Teaching Award in 2014.
  13. ITRI/ Excellent Teaching Award in 2015
  14. 2015榮獲中華民國私立教育事業協會/ 模範教師獎 (104)教協安字第1040000125號
  15. 2016 榮獲明新科技大學/工學院 專題比賽 論文組 第一名 (大學部 學生: 游一宏)
  16. 2016 International Conference on Innovation, Communication and Engineering/ Best conference paper award. 
  17. 2017電子,信號,與通訊創新科技研討會/國立高雄應用科技大學_優秀論文 (溫度調變下不同p通道鰭式電晶體之DIBL變化)
  18. 2017 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2017), Busan, Korea, Best Review Award.
  19. Intelligent Electronics Institute/ Industrial Development Bureau/ Ministry of Economic Affairs, Distinguished Teaching Award in 2017/8.
  20. Chair in WCNA2017 (2017/10 中國/深圳) (2017/10/09 會議取消)
  21. Obtained Minghsin Univ. of Science and Technology / Distinguished Teaching Award in 2018.
  22. 2018 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2018), 2018/5, Beijing, China., Best Review Award.
  23. Quarterly Franklin Membership (Membership ID#NF67107), Date: 2018/10/09, London Journals Press.
  24. Intelligent Electronics Institute/ Industrial Development Bureau/ Ministry of Economic Affairs, Distinguished Teaching Award in 2019/4.
  25. 2019 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2019), 2019/5, Shanghai, China., Best Review Award.
  26. Obtained Minghsin Univ. of Science and Technology / Distinguished Teaching Award in 2020/12. (4th Award)
  27. Obtained Minghsin Univ. of Science and Technology / Flexible salary award for special excellent faculty in 2021/09 
  28. Obtained The 18th National Electronic Design Creative Competition and Academic Symposium / Best conference paper award in 2022/03.
  29. Obtained 2022 9th IEEE ICSEVEN / Best Scholar Award in 2022/06.
  30. Obtained Minghsin Univ. of Science and Technology / Flexible salary award for special excellent faculty in 2022/09. (2nd Award)
  31. Obtained Minghsin Univ. of Science and Technology / Distinguished Teaching Award in 2023/01. (5th Award)
  32. Obtained 10th IEEE & 11th ICSEVEN / Oral Best Paper Award in Jan. 2023.
  33. Obtained 10th IEEE & 11th ICSEVEN / Academic Contribution Award in Jan. 2023.
  34. Obtained 3rd IEEE ICEIB2023 / Best Conference Paper Award in Apr. 2023.
  35. Obtained 12th IEEE & 13th ICSEVEN / Poster Best Paper Award in Nov. 2023
  36. Obtained 12th IEEE & 13th ICSEVEN / Academic Achievement Award in Nov. 2023
  37. Obtained Minghsin Univ. of Science and Technology / Flexible salary award for special excellent faculty in Nov. 2023. (3rd Award)

 

【Industrial Cooperation or Research Projects】

  1. 科準科技公司，「0.175微米DRAM晶片捐贈」，捐贈金額US$143,445，2006/2月.
  2. 國科會計畫NSC 96-2221-E-159-017，「在奈米製程下，銅金屬導線之電子遷移與肌膚效應結合後，在射頻頻率範圍操作中，共伴效應之研究」，計畫經費: NT$ 560,000，2007/8月~ 2008/7月.
  3. 台大RF ID教育暨研發實驗中心，「教育部RFID 科技及應用人才培育先導型計畫--- RF IC Design」，計畫經費: NT$ 480,750，2008/4月~ 2009/3月.
  4. 明新科大，「校內專題計劃:0.18um矽基材 CMOS 射頻積體電路中功率放大器之散熱路徑模擬」，計畫: MUST-95-電子-01，經費: NT$ 40,000，2006/1月~ 2006/9月.
  5. 清華大學/工程與系統科學系，「腦科學光纖感測與給藥系統」，2003/4月~ 2008/8月.
  6. 交通大學/材料工程與科學系，「綠光雷射退火下Panel電晶體之元件特性探討與可靠性量測」，2008/1月~ 2009/12月.
  7. 明新科大，「校內專題計劃: 綠光雷射退火後之多晶矽薄膜電晶體特性與可靠性研究」，計畫: MUST-98電子-9，經費: NT$ 36,000，2009/1月~ 2009/9月. (共同主持人)
  8. 北科大機電整合研究所，「奈米矽元件研發中心」成員之一.
  9. 工業技術研究院，「新型USB充電器電路之開發及控制」，產(工)99050，合作金額NT$199,000，2010/5月~ 2010/11月. (共同主持人)
  10. 雷剛科技公司，「RFID中低雜訊放大器之最佳化佈局研究」，產(工)99065，合作金額NT$100,000，2010/10月~ 2011/6月.
  11. 泓廣科技公司，「高耐壓高電流場效電晶體之研究及電性分析」，產(工)100007，合作金額NT$100,000，2011/1~ 12月. (共同主持人)
  12. 明新科大，「校內專題計劃: N型多晶矽薄膜電晶體在綠光雷射退火與活化後之C-V特性與可靠性研究」，計畫: MUST-100-電子-5，經費: NT$ 50,000，2011/1月~ 2011/9月.
  13. 明新科大，「校內專題計劃: 接觸蝕刻截止層厚度應變對奈米等級矽電晶體之電特性與可靠性研究」，計畫: MUST-101-電子-1，經費: NT$ 33,000，2012/1月~ 2012/9月. (共同主持人)
  14. 明新科大，「校內專題計劃: 45 奈米等級矽應變與矽鍺通道元件之電特性與可靠度研究」，計畫: MUST-101-電子-2，經費: NT$ 33,000，2012/1月~ 2012/9月.
  15. 泓廣科技公司，「功率積體電路之研究及電路分析」，產(工)1010012，合作金額NT$60,000，2012/1~ 7月.
  16. 明新科大，「校內專題計劃: 藉由TCAD模擬軟體輔助以探究奈米等級接觸蝕刻停止層應力於應變矽電晶體之通道電場分佈」，計畫: MUST-102-電子-1，經費: NT$ 56,000，2013/1月~ 2013/9月.
  17. 明新科大，「校內專題計劃: 28奈米氧化鉿/氧化鋯/氧化鉿閘極介電物質使用去耦合氮化電漿製程後之元件熱載子可靠性研究」，計畫: MUST-103電子-3，經費: NT$ 38,000，2014/1月~ 2014/9月.
  18. 台北科技大學/材料科學與工程研究所，中科院計畫:高純度鉭金屬電子槍熔煉參數優化與薄膜應用技術研究，契約編號: CSIST-706-V202，經費: NT$ 500,000， 2015/2月~ 2015/12月 (協同主持人; 主持人: 陳適範)
  19. 矽格產學計劃，「多通道電源供應量模組技術開發」，計畫: 產(工)104-0034，經費: NT$ 1,400,000，2015/1月~ 2016/3月. (共同主持人; 主持人: 呂明峰)
  20. 科技部104年度大專學生研究計畫，「積體電路製程中微影曝光能量與乾蝕刻參數調變對n型奈米鮨式電晶體之電性特性研究」，計畫: 104-2815-C-159-023-E，經費: NT$ 48,000，2015/7月~ 2016/2月. (主持人; 參與學生: 游一宏)
  21. 明新科大，「校內專題計劃: n型鰭式電晶體之爾利效應與閘極電壓並溫度效應相依性之研究」，計畫: MUST-105電子-4，經費: NT$ 50,000，2016/1月~ 2016/9月.
  22. 台北科技大學/材料科學與工程研究所，中科院計畫: 高純度鎢金屬電子槍熔煉參數優化與薄膜應用技術研究，契約編號: CSIST-706-V302，經費: NT$ 500,000， 2016/2月~ 2016/12月 (協同主持人; 主持人: 陳適範)
  23. 明新科大，「校內專題計劃: 奈米鰭式電晶體閘極介電物質成長後之漏電流品質驗證」，計畫: MUST-106電子-5，經費: NT$ 100,000，2017/1月~ 2017/9月(計畫主持人).
  24. 台北科技大學/材料科學與工程研究所，中科院計畫: 高溫超合金材料設計及特性研究，契約編號: NCSIST-1164-V101(106)，經費: NT$ 600,000， 2017/2月~ 2017/12月 (協同主持人; 主持人: 王錫九)
  25. 科技部106年度大專學生研究計畫，「SOI晶片上之n型奈米鰭式電晶體其源/汲極延伸電阻對元件電特性影響之研究; 科技部編號106-2813-C-159-022-E，經費: NT$ 48,000，2016/7月~ 2017/2月. (主持人; 參與學生: 劉昌昇)
  26. 明新科大，「校內專題計劃: SOI晶片上之n型奈米鰭式電晶體其GCIP模型特性研究」，計畫: MUST-107電子-1，經費: NT$ 70,000，2018/1月~ 2018/9月(計畫主持人).
  27. 107學年度科學工業園區人才培育計畫---積體電路佈局模擬與測試實務，經費: NT$859,000元，執行期程自107年7月1日起至108年8月31日止(共同主持人; 主持人: 陳啟文)
  28. 107學年 外訓培訓計畫: 積體電路封裝測試人才培訓; (國軍退除役官兵輔導委員會/新竹榮民服務處)，經費: NT$1,290,000元，執行期程自107年7月1日起至108年8月31日止(共同主持人; 主持人: 沈添賜)
  29. 107學年度至110/8/31: 半導體封裝測試實務人才培育計畫─建置半導體封裝測試類產線，經費: NT$3,800萬元，臺教技(二)字第1070140363R號 (共同主持人; 主持人: 呂明峰)
  30. 明新科大，「校內專題計劃: 奈米MOSFET與FinFET閘極介電層之恢復性研究」，計畫: MUST-108電子-3，經費: NT$ 70,000，2019/1月~ 2019/9月(計畫主持人).
  31. 台北科技大學/材料科學與工程研究所，中科院計畫: 高溫超合金材料之輕量化研究，契約編號: NCSIST-1164-V201（107），經費: NT$ 600,000， 2018/1月~ 2018/12月 (協同主持人; 主持人: 王錫九)
  32. 台北科技大學/材料科學與工程研究所，中科院計畫: 高溫超合金合金優化及其特性研究，契約編號: NCSIST-1164-V301（108），經費: NT$ 600,000， 2019/1月~ 2019/12月 (協同主持人; 主持人: 王錫九)
  33. 科技部，產學合作計畫: 功率元件防護層之超高頻電漿薄膜沉積技術(1/3) (合作廠商: ：優貝克科技股份有限公司) ，計畫編號: MOST 108-2622-E-159-003 -CC2，經費: NT$ 2,259,151，2019/11/01 ~ 2020/10/31 (共同主持人; 主持人: 林啟瑞)
  34. 明新科大，巨虹電子產學: AOI-AI雲端檢測系統開發-智慧鞋業，計畫編號: 產(工)108-0029，經費: NT$ 510,000，2019/9月~ 2020/4月(計畫主持人).
  35. 明新科大，「校內專題計劃: AI技術應用於傳產製鞋業價值提升」，計畫: MUST-109任務-4，經費: NT$ 80,000，2020/1月~ 2020/9月(計畫主持人).
  36. 台北科技大學/材料科學與工程研究所，中科院計畫: 高溫超合金合金優化及其特性研究(II)，契約編號: NCSIST-1164-V401（109），經費: NT$ 600,000， 2020/1月~ 2020/12月 (協同主持人; 主持人: 王錫九)
  37. 科技部，產學合作計畫: 功率元件防護層之超高頻電漿薄膜沉積技術(2/3) (合作廠商: ：優貝克科技股份有限公司) ，計畫編號: MOST 109-2622-E-159-001，經費: NT$ 2,261,971，2020/11/01 ~ 2021/10/31 (共同主持人; 主持人: 林啟瑞)
  38. 明新科大，「校內專題計劃: 在不同氮化製程下奈米HK pMOSFET之閘極介電質均勻性分析研究」，計畫: MUST-110任務-09，經費: NT$ 60,000，2021/1月~ 2021/9月(計畫主持人).

 

【Short-term Training Courses at Off-campus】

Through Tze Chiang Foundation of Science and Technology(TCFST), Taiwan Semiconductor Industry association (TSIA), Electronic Training Center/National Chiao Tung Univ. (NCTU), Hsinchu Science Park (HSP) and Industrial Development Bureau (IDB)/ Ministry of Economic Affairs, etc to some companies or institutes as short-term lecturer:

(1998~ 2001: Outside teaching, 15 times)

Item

Course or Speech

Organization

Date

1

Device and Product Reliability at UMC

UMC

July, 1998

2

Metal Reliability

NCTU

Nov., 1998

3

Gate Oxide Reliability

UMC

Jan., 1999

4

VLSI Device Measurement and Reliability

TCFST

Feb., 1999

5

VLSI Device Measurement and Reliability

TCFST

Apr., 1999

6

Advanced Reliability and Characterization Workshop

UMC

Apr., 1999

7

IC Reliability and Failure Analysis

NCTU

June, 1999

8

Device and Product Reliability at UMC

UMC

July, 1999

9

Plasma Process Induced Damage

UMC/IC2

Nov., 1999

10

Gate Oxide Reliability

UMC/TD

Dec., 1999

11

IC Device Characterization and Analysis

TCFST

Feb., 2000

12

Introduction to Semiconductor Devices

TCFST

Apr., 2000

13

Advanced Process Reliability and Characterization

TCFST

May, 2000

14

Practice of IC Process Technology

TCFST

Aug., 2000

15.

Device and Product Reliability at UMC

UMC

Nov., 2000

 

(2002~ 2023: Outside teaching, 167 times)

Item

Course or Speech

Organization

Date

1

VLSI Process Reliability

TCFST

June, 2002

2

VLSI Device Measurement and Reliability

TCFST

July, 2002

3

VLSI Device Parameters with the Applications of QA

TCFST

Oct., 2002

4

Advanced VLSI Device Measurement and Reliability

TCFST

Sept., 2002

5

VLSI Device Measurement and Reliability

TCFST

Jan., 2003

6

Applications of VLSI Parameters and Statistics for QA and RA

TCFST

Mar., 2003

7

0.25um or below Device Measurement and Reliability

TCFST

June, 2003

8

Analog and Mixed-mode Circuit Design with Device Physics

IDB

June, 2003

9

Analog and Mixed-mode Circuit Design with Logic Process

IDB

Aug., 2003

10

Introduction to CMOS

PowerChip

Sept., 2003

11

Ultra-thin Oxide Characterization

MIC

Nov., 2003

12

Product Reliability

PowerChip

Dec., 2003

13

Device Physics in TFT Flat Panel Display

IDB

Mar., 2004

14

VLSI Device Measurement and Reliability

TCFST

Apr., 2004

15

Device Physics in Logic Process Integration

IDB

July 2004

16

MOS Physics in Logic Process Integration

IDB

July 2004

17

Device Physics in TFT Flat Panel Display

IDB

July, 2004

18

Material Selection in Process Chambers

Applied Materials

Oct., 2004

19

e-learning courses in “CMOS Process Integration”

HSP

Oct., 2004

20

e-learning courses in “Introduction to Process Integration”

HSP

Oct., 2004

21

Introduction to DRAM Process

Winbond

Nov., 2004

22

Semiconductor Device Physics, especially in TFT Transistor

AUO

Nov., 2004

23

Introduction to Semiconductor Production Fields

TCFST

Dec., 2004

24

Process Integration

TSMC

Jan., 2005

25

Wafer Level Reliability

TCFST

Mar., 2005

26

Introduction to Process Integration

EpiSil

Apr., 2005

27

Introduction to Process Integration with Copper Process

Winbond

May, 2005

28

Introduction to DRAM Process

Winbond

Aug., 2005

29

Micro-electronics

TSMC

Aug., 2005

30

Principles and Introduction to Semiconductor Process

TCFST

Oct., 2005

31

Process Integration

TSMC

Nov., 2005

32

Failure Analysis in Si-Semiconductor Field

TSIA

Dec., 2005

33

Process Integration

TSMC

Feb., 2006

34

DRAM Process

TCFST

Feb., 2006

35

Failure Analysis in Si-Semiconductor Field

TSIA

July., 2006

36

Relationship between Process and Yield

TCFST

Sept., 2006

37

Advanced Process Integration

TSIA

Oct., 2006

38

Semiconductor Device Physics

TSIA

Nov., 2006

39

Wafer Level Reliability

TCFST

Feb., 2007

40

Fundamental Principles of Process Integration

TSIA

Aug., 2007

41

Failure Analysis in Si-Semiconductor Field

TSIA

Aug., 2007

42

Concepts and Principles of Semiconductor Process

TCFST

Sept., 2007

43

Process Integration

NCTU

Sept., 2007

44

High ESD SOI Pad Designing

Chiplus

Sept., 2007

45

Introduction to Micro-electronics

UMC

Nov., 2007

46

Basic Electricity

TCFST

Feb., 2008

47

Basic Electrical Circuits

Promos Technology

Mar., 2008

48

Process Module --- Thin Film Technology

TSIA

Apr., 2008

49

Measurement Technology in Semiconductor Process

PowerChip

Apr., 2008

50

Principle of Semiconductor Process Integration-Basics

TSIA

June, 2008

51

Thin Films in Semiconductor Field

TSIA

July, 2008

52

Failure Analysis for Semiconductor

TSIA

Aug., 2008

53

Diffusion in Semiconductor Field

TSIA

Aug., 2008

54

Introduction to Micro-electronics

UMC

Aug., 2008

55

Introduction to Digital Logics

UMC

Aug., 2008

56

Introduction to Micro-electronics

UMC

Sept., 2008

57

Introduction to Digital Logics

UMC

Sept., 2008

58

FA analysis Technology in Semiconductor

Delta Company

July, 2009

59

Principles of Semiconductor Process Integration

ITRI

Aug., 2009

60

VLSI Process Integration

TCFST

Sept., 2009

61

Semiconductor Device Physics

NCTU

Oct., 2009

62

Testing and Principles of Backend Semiconductor Process

Analog Integrations Company

Oct., 2009

63

Introduction to Micro-electronics

UMC

Nov.., 2009

64

Introduction to Digital Logics

UMC

Nov.., 2009

65

Basic Semiconductor Process

IDB

Jan., 2010

66

Introduction to Device Physics

UMC

Jan., 2010

67

Activities of Semiconductor Process Integration

ITRI

Mar., 2010

68

Introduction to Device Physics

UMC

Apr., 2010

69

Introduction to Micro-electronics

UMC

May, 2010

70

Applications to Basic Electronic Circuits

TCFST

May, 2010

71

Introduction to Digital Logics

UMC

June, 2010

72

Introduction to Device Physics

UMC

Aug., 2010

73

Introduction to Digital Logics

UMC

Oct., 2010

74

Introduction to Micro-electronics

UMC

Oct., 2010

75

Introduction to Device Physics

UMC

Nov., 2010

76

RF IC Circuit Design

ITRI/NXP

Nov., 2010

77

Applications to Basic Electronic Circuits

TCFST

Nov., 2010

78

Testing and Principles of Backend Semiconductor Process

NCTU

Dec., 2010

79

Introduction to Device Physics

UMC

Jan., 2011

80

Introduction to Micro-electronics

UMC

Apr., 2011

81

Introduction to Device Physics

UMC

Apr., 2011

82

Introduction to Digital Logics

UMC

May, 2011

83

Failure Analysis for IC

NCTU

June, 2011

84

Semiconductor Device Physics

NCTU

July, 2011

85

Introduction to Device Physics

UMC

July, 2011

86

Testing and Principles of Backend Semiconductor Process

NCTU

Aug., 2011

87

Reliability of MOSDevices

NCTU

Aug., 2011

88

Failure Analysis for Semiconductor

ITRI

Aug., 2011

89

Integration of Semiconductor Process

Promos Technology

Oct., 2011

90

Introduction to Device Physics

UMC

Oct., 2011

91

Advanced Lithography Process

KLA-Tencor

Nov., 2011

92

Introduction to Device Physics

UMC

Feb., 2012

93

Testing and Principles of Backend Semiconductor Process

NCTU

Mar., 2012

94

Advanced Nano-Lithography Process

NCTU

May, 2012

95

Introduction to Device Physics

UMC

July, 2012

96

Introduction to Semiconductor Testing and Identification  and Applications of Electronic Components (A-Class)

ThaiLin Technology

July, 2012

97

Introduction to Semiconductor Testing and Identification  and Applications of Electronic Components (B-Class)

ThaiLin Technology

Aug., 2012

98

Introduction to Semiconductor Testing and Identification  and Applications of Electronic Components (Normal Class)

ThaiLin Technology

Sept., 2012

99

Introduction to Device Physics

UMC

Nov., 2012

100

Introduction to CMOS IC Process

Silicon Technology

Apr., 2013

101

Introduction to Device Physics

UMC

June, 2013

102

Principles of Process Integration and Equipment Applications

ITRI

July, 2013

103

Testing and Principles of Backend Semiconductor Process

NCTU

Aug., 2013

104

Introduction to CMOS IC Process

Silicon Technology

Aug., 2013

105

Advanced Nano-Lithography Process

NCTU

Aug., 2013

106

Introduction to CMOS IC Process

Silicon Technology

Oct., 2013

107

Introduction to Device Physics

UMC

Oct., 2013

108

Introduction to CMOS IC Process

Silicon Technology

Feb., 2014

109

Introduction to Device Physics

UMC

Mar., 2014

110

Rliability tests of semiconductor devices

NCTU

June, 2014

111

Introduction to Device Physics

UMC

Aug., 2014

112

Introduction to CMOS IC Process

Silicon Technology

Aug., 2014

113

Introduction to Semiconductor Testing and Identification  and Applications of Electronic Components (Normal Class)

ThaiLin Technology

Sept., 2014

114

Introduction to Device Physics

UMC

Dec., 2014

115

Introduction to CMOS IC Process

Silicon Technology

Mar., 2015

116

Introduction to Device Physics

UMC

Apr., 2015

117

Reliability tests of semiconductor devices

NCTU

June, 2015

118

Principles of Process Integration and Equipment Applications

ITRI

July, 2015

119

Introduction to Device Physics

UMC

Aug., 2015

120

Applications and Backend Assembly for Schottky Barrier Diodes and MOSFETs

TCFST/ChipMOS

Aug., 2015

121

Testing and Principles of Backend Semiconductor Process

NCTU

Oct., 2015

122

Introduction to Device Physics

UMC

Oct., 2015

123

Introduction to Device Physics

UMC

Feb., 2016

124

Introduction to CMOS IC Process

Silicon Technology

June 2016

125

IC Failure Analysis

NCTU

June 2016

126

Advanced Semiconductor Manufacturing Technology

SPIL/Taichung

June 2016

127

IC Package Failure Analysis and Issue Solution

SPIL/Taichung

July 2016

128

Introduction to Device Physics

UMC

Aug., 2016

129

Introduction to Device Physics

UMC

Feb., 2017

130

Introduction to Device Physics

UMC

May, 2017

131

Introduction to Package Process

VIS/ Hsinchu

July, 2017

132

Semiconductor Process Integration (Class A)

TCFST

July 2017

133

Cell Process in DRAM (Class A)

TCFST

July 2017

134

DRAM Process Integration (Class A)

TCFST

July 2017

135

IC Failure Analysis

NCTU

July 2017

136

Semiconductor Process Integration (Class B)

TCFST

Aug. 2017

137

Cell Process in DRAM (Class B)

TCFST

Aug. 2017

138

DRAM Process Integration (Class B)

TCFST

Aug. 2017

139

Introduction to Device Physics

UMC

Aug. 2017

140

Advanced Semiconductor Manufacturing Technology

SPIL/Taichung

Aug. 2017

141

Cell Process in DRAM (Class A)--- JHICC, China

TCFST

Sept. 2017

142

DRAM Process Integration (Class A) --- JHICC, China

TCFST

Sept. 2017

143

Cell Process in DRAM (Class B) --- JHICC, China

TCFST

Sept. 2017

144

DRAM Process Integration (Class B) --- JHICC, China

TCFST

Sept. 2017

145

Cell Process in DRAM (Class C) --- JHICC, China

TCFST

Oct. 2017

146

DRAM Process Integration (Class C) --- JHICC, China

TCFST

Oct. 2017

147

Semiconductor Process Integration

TCFST

Nov. 2017

148

Cell Process in DRAM

TCFST

Dec. 2017

149

DRAM Process Integration

TCFST

Dec. 2017

150

Introduction to Device Physics

UMC

Jan. 2018

151

Introduction to Device Physics

UMC

July 2018

152

Applications and Backend Assembly for Schottky Barrier Diodes and MOSFETs

TCFST/ChipMOS

Nov., 2018

153

Introduction to Device Physics

UMC

April 2019

154

Introduction to Device Physics

UMC

April 2020

155

Semiconductor Process Integration

TCFST

Mar. 2021

156

Introduction to Device Physics

UMC

April 2021

157

IC Package and Testing

TCFST

Aug. 2021

158

Introduction to Device Physics

UMC

Oct. 2021

159

Semiconductor Process Integration

TCFST

Mar. 2022

160

Introduction to Device Physics

UMC

Mar. 2022

161

Nano-lithography Technology

ITRI

Apr. 2022

162

Introduction to Semiconductor Physics

IDB

June 2022

163

IC Package and Testing

TCFST

July 2022

164

Introduction to Device Physics

UMC

Nov. 2022

165

Semiconductor Process Integration

TCFST

Mar. 2023

166

Introduction to Device Physics

UMC

May 2023

167

IC Package and Testing

TCFST

July 2023

 

【Off-campus Speech】

  1. Institute of Materials/ National Chiao-Tung Univ.: Topic: “Detection of antenna effect at the deep-submicron or nano CMOS process”, 2005/5.
  2. Institute of Mechatronic Engineering/ National Taipei Univ. of Technology: Topic: “Review of trend of DRAM process technology”, 2005/11.
  3. Department of Electrophysics/ National Chiao-Tung Univ: Topic: “Fabry-Perot Fiber Sensor--- Applications of Bio-technology and Car-engine Combustion”, 2006/12.
  4. Hsinchu ING insurance company: Topic: “Power after Burning Life”, 2008/1.
  5. Department of Communications, Navigation and Control Engineering/ National Taiwan Ocean Univ.: Topic: “Nano-technology probing the life meaning”, 2009/12.
  6. Occupation Master Class/ Engineering College/National Chiao-Tung Univ.: Topic: “Commercial Chance and Development Evolution of Advanced Semiconductor Process”, 2011/11
  7. College of Engineering and Information/ Vanung Univ.: Topic: “Experience Sharing for Seed Teachers with English Teaching”, 2011/12
  8. Department of Photonics/ National Cheng Kung Univ.: Topic: “The Electrical Characteristics and Reliability of N-channel Poly-Silicon Thin-Film Transistor with Continuous-Wave Solid-State Green Laser Lateral Crystallization Channel”, 2012/3
  9. Association of Taiwan Labor and Resource: Topic: “Expert Need and Trend of Smart Home-electrical Communication Technology between Cross-strait”, 2012/3
  10. 2012 International Conference on Commercialization of Transducer & MEMS: Keynote speech “Nano-stacked high-k gate dielectric and 3D fin-shaped structures”, 2012/9. (Suzhou, China)
  11. Department of Electronics Engineering/ National Kaohsiung Univ. of Applied Sciences : Topic: “Evolution of IC Process and Device Development”, 2013/3
  12. College of Engineering and Electronic Information/ Vanung Univ.: Topic: “Development and Chance of Nano-tech Semiconductor Industry”, 2013/5
  13. Department of Electrical Engineering/ National Univ. of Kaohsiung: Topic: “Dreams and Business Chances of Nano- Technology Industry”, 2014/9
  14. College of Engineering and Electronic Information/ Vanung Univ.: Topic: “Challenge and Marketing of Advanced Nano-node Semiconductor Industry”, 2016/11.
  15. General Teaching/ Hsinchu Education University, Topic: “Revelation of IC Industry Related to the Personality Education”, 2016//10/25.
  16. General Teaching/ College of Eduction of National Tsing Hua Univ., Topic: Life including Love, Truth, Hope, and Religion”, 2017/05/02.
  17. General Teaching/ College of Eduction of National Tsing Hua Univ., Topic: Life including Love, Truth, Hope, and Religion”, 2019/04/23.
  18. Department of Computer and Communication Engineering, NKUST; Seminar topic:“Technical Undergraduate Students Excitingly Standing Firm in Semiconductor Fields”, 2020/09/30.
  19. Department of Electronic Engineering, NKUST; Seminar topic: “Evolution and Challenge of Field-Effect Transistors”, 2021/03/08.
  20. Grade 3 of Electrical Engineering/ Hsinchu Panshi High School: Topic: "Semiconductor-related industry, education, workplace awareness education”, 2021/03/12.
  21. 新竹磐石高中 “半導體社團” 演講3次, 2022/09/16, 11/11, 12/02
  22. 大甲高工: 題目: “半導體產業的發展：技職生的角色與挑戰”, 2022/10/07.
  23. 楊梅高中: 題目: “半導體產業發展: 青年學子們的機會與承擔”, 2022/10/14.
  24. 新竹磐石高中 “半導體社團” 演講3次, 2023/02/24, 03/03, 03/31

 

 

【Outside-campus Master/Ph.D. Oral Committee】

  1. Institute of Electronics/ National Chiao-Tung Univ.: in 2000: 2 students
  2. Institute of Mechatronic Engineering/ National Taipei Univ. of Technology: 2002~ 2019: 72 students
  3. Institute of Automation Technology/ National Taipei Univ. of Technology: 2002~ 2010: 3 students
  4. Institute of Materials and Mineral Resources Engineering/ National Taipei Univ. of Technology: 2016: 1 student
  5. Department of Engineering and System Science/ National Tsing-Hua Univ.: 2003 ~ 2006: 4 students
  6. Institute of Materials/ National Chiao-Tung Univ.: 2007~ 2010: 5 students
  7. Department of Electronics Engineering/ National Kaohsiung Univ. of Applied Sciences:2009-2017: 7 students
  8. Department of Mechatronic Technology/ National Taiwan Normal Univ.: 2010-2014: 8 students
  9. Institute of Electronics/ Chung Yuan Christian University: 1 student
  10. EMBA/ Yuan Ze University:2021: 2 students
  11. Department of Electronic Engineering/ Minghsin Univ. of Science and Technology: 2005-2023: 46 students
  12. Department of Electronics Engineering/ National Kaohsiung University of Science and Technology:2013-present: 2 students

 

Year Type Title
2021 校內專題計劃 在不同氮化製程下奈米HK pMOSFET之閘極介電質均勻性分析研究
2020 校內專題計劃 AI技術應用於傳產製鞋業價值提升
2019 校內專題計劃 奈米MOSFET與FinFET閘極介電層之恢復性研究
2019 民間企業產學計畫案（私人企業或法人機構之案件） AOI-AI雲端檢驗系統開發-智慧鞋業
2018 校內專題計劃 SOI晶片上之n型奈米鰭式電晶體其GCIP模型特性研究
2017 校內專題計劃 奈米鰭式電晶體閘極介電物質成長後之漏電流品質驗證
2016 校內專題計劃 n型鰭式電晶體之爾利效應與閘極電壓並溫度效應相依性之研究
2014 校內專題計劃 28奈米氧化鉿/氧化鋯/氧化鉿閘極介電物質使用去耦合氮化電漿製程後之元件熱載子可靠性研究
2013 校內專題計劃 藉由TCAD模擬軟體輔助以探究奈米等級接觸蝕刻停止層應力於應變矽電晶體之通道電場分佈
2012 校內專題計劃 45 奈米等級矽應變與矽鍺通道元件之電特性與可靠度研究
2012 民間企業產學計畫案（私人企業或法人機構之案件） 功率積體電路之研究及電路分析
2011 校內專題計劃 N型多晶矽薄膜電晶體在綠光雷射退火與活化後之C-V特性與可靠性研究
2010 民間企業產學計畫案（私人企業或法人機構之案件） RFID中低雜訊放大器之最佳化佈局研究
Year Title
2024 金氧半光感測器
2024 用微控器作矽光感測系統
2023 A Model for the Frequency Dispersion of p-type Si/Ga2O3 Capacitance and Conductance in Accumulation
2023 Voltage Gain of 28nm-node Various Channel-width pMOSFETs under Thermal Annealing Treatments of DPN Processes
2023 Gain Performance of Nano-node Channel-width nMOSFETs Treated by DPN Processes with Various Nitrogen Concentrations
2023 Gain Efficiency of 28 nm-node Various Channel-width pMOSFETs under Nitrogen Concentration of DPN Treatment
2023 Amplification Gain of Nano-node Channel-width nMOSFETs with Thermal Annealing Treatments of DPN Processes
2023 Dit Extraction of Nano-node HK/MG nMOSFETs Treated with DPN Process under Diverse Nitrogen Concentration
2023 Degradation Study of RhB with Ag3PO4-Na2SiO3 under Visible Light
2023 Substrate Bias Effect of 28 nm-node HK/MG nMOSFETs with DPN Temperature Treatments
2023 Back-bias Effect of Nano-node HK/MG nMOSFETs under Different Nitrogen Concentration of DPN Process Treatment
2023 C-V Characteristics of Nano-node HK/MG nMOSFETs with LDD and SDE implantation
2023 Study of Enlarged Field Enhancement Factor for Carbon Nanotubes on Millimeter Scaled Platform
2023 不同氮濃度DPN製程處理下28 nm節點I/O HK/MG nMOSFETs之基底偏壓效應
2023 28 nm節點I/O HK/MG nMOSFETs在不同溫度DPN製程處理下之基底偏壓效應
2023 基底偏壓效應探究28 nm節點I/O HK/MG nMOSFETs在不同退火溫度和氮濃度DPN製程處理下之電特性
2022 λ-factor of Nano-node HK/MG nMOSFETs with DPN Different Annealing Temperatures
2022 奈米HK/MG nMOSFET元件在不同氮化退火溫度與高/低汲極電場下之通道調變效應
2022 奈米製程之DIBL效應量測技術探討
2022 奈米等級nMOSFETs與nFinFETs之DIBL效應比較與探討
2022 奈米nMOSFET中閘極電場對通道等效遷移率之影響
2022 Reduction Study of MB with Ag3PO4/Na2SiO3
2022 Electrical Characteristics of 28nm-node Small p-channel MOSFETs with High-k/Metal Gate Processes
2022 Electrical Performance of 28nm-node Long/Short Channel-width nMOSFETs under DPN Nitridation Treatment
2021 Anneal Effect of Bi2MoO6/SnOx:N to the Degradation of RhB under Visible Light Irradiation
2021 以轉導觀點探究3D nMESFET與 III-V 3D nMOSFET之優劣
2021 奈米SOI n-型鰭式電晶體在閘極電場偏壓下之爾利效應修正
2021 Channel Surface Integrity with 2.4nm High-k Gate Dielectric under DPN Treatment at Different Annealing Temperatures
2021 28奈米HK/MG製程在不同氮化退火溫度下I/O nMOSFET閘極氧化層品質均勻性分析
2020 Integrity of N-type Channel Surface for Nano-node High-k Gate Dielectric
2020 ON/OFF Current of Nano-node Field-Effect Transistors on p-substrate or SOI Substrate
2020 Junction Integrity for 28nm High-k nMOSFETs with Thermal Stress
2020 Q-factor Investigating Integrity of 28nm-node High-k Gate Dielectric
2020 Test Patterns Exposing Integrity of 28nm-node High-k Gate Dielectric on p-substrate with Nitridation Treatments
2020 Integrity of Fringe Gate Leakage for 28nm HK/MG nMOSFETs with Nitridation Treatments
2020 Leakage of High-k Gate Dielectric of nMOSFETs with DPN Treatment under Various Nitrogen Concentrations
2020 Effect of Bismuth Content in Precursor on the Structural and Optical Properties of Bismuth Molybdenum Oxide Film Prepared by Spray Pyrolysis
2020 Electrical Characterization of Si/ZnO:Er,Yb Diode on NH4F/AgNO3 Aqueous Solution Processed Si Substrate
2020 Silane-free procedure for SiO2 layer formation at room temperature
2019 Nano-node n-type Gate Dielectric Integrity and Uniformity Correlated to Nitridation Process
2019 Uniformity of Gate Dielectric for Core HK/MG pMOSFET with Nitridation Treatments
2019 Gate Dielectric Distribution of I/O HK/MG pMOSFET with Nitridation Treatments
2019 Electrical Study of Er and N codoped Zinc Oxide Diode
2019 Study of State Energies in InAs/GaSb Superlattice with InSb Interlayer
2019 Photoluminescence Study of Er doped Zinc Oxide Prepared by Spray Pyrolysis with Zinc Formate Precursor
2019 Punch-through and DIBL Effects Exposing Nano-node SOI FinFETs under Heat Stress
2019 Comparison of Degradation and Recovery of SiONx and Hf-based Dielectric under Electrical-field Stress
2018 Conductivity Study of Er doped Zinc Oxide by Spray Pyrolysis with Zinc Formate Precursor
2018 Thickness Study of Er-doped Magnesium Zinc Oxide Diode
2018 Abnormal Characteristics of Drive Current for n-type FinFETs under Normal Operation Field
2018 DIBL Effect for Nano-node p-type FinFETs under Thermal Stress
2018 Punch-through Effect for Nano-node n-type FinFETs under Thermal Stress and Vt Implant Energy
2018 Anneal effect of Er doped zinc oxide by spray pyrolysis
2018 Observation of Degradation and Recovery of Stacked HfOx/ZrOy/HfOx MOSFETs
2018 Off-state Current Behaviors of 28nm-node nMOSFETs under Negative Gate Bias
2018 The μeq Fitting for Mixed Current Model of MOSFETs Considering Horizontal Electric Field
2018 Electrical Characteristics of WO3/Ag/WO3 Sandwich Structure Fabricated with Magnetic-control Sputtering Metrology
2018 Drive Current Behaviors of Multi N-channel FinFETs under Different VT Implant Energies
2018 GIDL Effect Observed in FinFET Shapes and VT Implant Energy
2018 Off-state Drain Current Characteristics of p-type Multi-channel FinFETs Impacted with Different Vt Implantation Energy
2018 A Prototype of Mini-wireless Remote Monitoring Control System Applied to Delicate Agriculture
2017 DIBL Effect Gauging the Integrity of Nano-node n-channel FinFETs
2017 VT Implant Energy Impacting DIBL and Punch‐through Effects of Nano‐node n‐channel FinFETs on SOI Wafers
2017 Decoupled Tunneling and GIDL Effects for 28nm High‐k Stacked nMOSFETs
2017 Deposition Temperature Study of Nitrogen‐doped Zinc Oxide by Spray Pyrolysis
2017 Electrical Stress Probing Recovery Efficiency of 28nm HK/MG nMOSFETs under Different Nitrogen Concentration in Nitridation
2017 Voltage Stress Exposing Degradation Rate of 28nm HK/MG nMOSFETs under Different Nitridation Annealing Temperatures
2017 Isolation Integrity of Drain/Gate Contact Exposed with Source/Drain Extension Length for SOI p‐channel FinFETs
2017 I‐V Model of Nano nMOSFETs Incorporating Drift and Diffusion Current
2017 The DIBL Effect of SOI p‐channel FinFETs under Various SDE Lengths
2017 GIDL效應驗證微影偏移於奈米SOI n通道FinFETs
2017 長源/汲極延伸長度與不同VT離子佈植能量下在SOI n通道FinFETs中之DIBL與次臨界擺幅效應
2017 不同源/汲極延伸長度在SOI n通道FinFETs中之DIBL與貫穿效應
2017 n型奈米鰭式電晶體在汲極加壓後之元件劣化探討
2017 n型奈米鰭式電晶體閘極電流密度分佈探討
2017 溫度調變下不同p通道鰭式電晶體之DIBL變化
2017 n通道鰭式電晶體在溫度不同之汲極引起的能障下降變化
2017 Degradation and Recovery of HfZrO2 Dielectric under Voltage Stress
2017 I-V Model for Nano-MOSFETs by Considering Diffusion Current
2017 Corner Gate Leakage of n-channel FinFETs under Heating Effect
2017 Resistance Study of Er doped Zinc Oxide Diode by Spray Pyrolysis
2017 Photocatalytic Study of Calcium Zinc Oxide with Different Calcium Content
2017 Plasma Implant Causing DIBL Variation in p-channel FinFETs with Single or Multi-fin Shape on SOI Wafer
2017 VT Ion Implant Inducing DIBL Variance in n‐channel FinFETs on SOI Substrate
2016 不同n型鰭式電晶體之爾利電壓變化與多根鰭之相依性
2016 不同通道之爾利效應在p型鰭式場效應電晶體
2016 調變微影曝光能量參數對n型奈米鰭式電晶體之電性特性研究
2016 通道寬度調變對奈米多通道n型鰭式電晶體之電特性探究
2016 氮氣流量對非晶氮化鉭應用於擴散阻絕層與擴散係數之影響研究
2016 Photocatalytic Study of Zinc Oxide with Different Bismuth Doping
2016 Dark current reduction of n-ZnO/p-Si diode with Boron doped interlayer
2016 Thermal Stress Exposing Surface Channel‐length Effect of Nano n-type FinFETs
2016 Substrate Current Characteristics for 28 nm HK/MG NMOSFETs under HC Stresses
2016 Hot‐Carrier Induced Degradation and Its Recovery in HK/MG NMOSFETs
2016 Feasible Programming Methods for 28nm‐node nMOSFETs
2016 CLM Effect of Nano p‐channel FinFETs Depending on VT Implant Energies
2016 Effective Surface Channel‐length Effect of Nano‐scale n‐channel FinFETs Integrated with VT Doping Energies
2016 Middle Gate Bias Exposing CLM Effect of Nano n‐channel FinFETs
2016 Heat Stress Impacting Early Effect of Nano p‐channel FinFETs at High Gate Field
2016 The Program Mechanism with CHEI/DAHC on Nano HK/MG CMOS Logic Process
2016 Nitrogen Flow Rate Relating Diffusion Behaviors of Copper in TaN Layers
2016 Performance of TaN as Diffusion Barrier Layer under N2 Flow‐rate Control
2016 A New Model Explaining the Saturation Current of Nano‐MOSFETs
2016 Early Effect of Nano p‐channel FinFETs Biased at Middle Gate Field
2016 Comparison of Nano-node n-channel FinFETs and 28nm HK/MG nMOSFETs
2016 Gate Leakage for Nano-node nMOSFETs and n-channel FinFETs
2015 Photocatalytic Study of Silver and Bismuth Codoped Zinc Oxide by Spray Pyrolysis
2015 Electrical Performance of Dense and Isolated n-type FinFETs in Micro-loading Effect
2015 Heating Stress Probing Electrical Performance of Multiple N-channel FinFETs with VT Doping Energies
2015 Electrical Characteristics of Multi-gate P-channel FinFETs with VT Implanting Energies under Temperature Stress
2015 CIP Metrology Improving the Bump Yield in Photo-lithography Process
2015 Reducing the Rework in the Photo-lithography Process of Wafer-bump Assembly with Quality Management
2015 Conductivity Study of Magnesium Zinc Oxide with Indium and Nitrogen co-doping by Spray Pyrolysis
2015 Visible Light Photocatalytic Study of Zinc Oxide Diode by Spray Pyrolysis
2015 Recovery of Hot-carrier Induced Degradation in HK/MG PMOSFETs Treated by Different Nitridation Conditions
2015 Simulation to Expose and Control the RSCE Effect for 28nm HK/MG nMOSFETs
2015 GCIP Characteristics of High-k Stack NMOSFETs
2015 The GCIP effect with High Drain-Bias Stress in 28 nm HK/MG nMOSFETs
2015 Multiple Sweeping Drain-Bias Stress in 28 nm HK/MG nMOSFETs
2015 Early Effect for n-type FinFETs with Single-fin or Multi-fin Contour
2015 A Derivative Metrology to Justify the Punch-Through Effect for n-type FinFETs
2015 Fringe-Gate Leakage Mechanisms under Various Source/Drain Extension Spacing for p-type FinFETs
2015 Electrical Characteristics of p-type FinFETs with Different Source/Drain Extension Spacing
2014 CLM Effect for 28nm Stacked HK NMOSFETs after DPN Treatment with Different Annealing Temperatures
2014 GIDL and Gated-Diode Metrologies for28nm HK/MG nMOSFETs in Nitridation Annealing Temperatures
2014 Electrical Quality of 28nm HK/MGMOSFETs with PDA and DPN Treatment
2014 Comparison of Gate Leakage for SiONx and HfZrOx Gate Dielectrics of MOSFETs with Decoupled Plasma Nitridation Process
2014 Early Effect Exposing Performance of 28nm HK/MG pMOSFETs under PDA or DPN Nitridation Treatment
2014 Relationship between Stress Distribution and Hot‐Carrier Effect for Strained nMOSFETs
2014 Discussion of different Nitrogen Concentrations and Annealing Temperatures on GIDL Current Characteristics of High-k Stack PMOSFETs
2014 The Gate Leakage of 28 nm MOSFETs by Different Processes of DPN Treatments
2014 Drain Field Exposing Hump Effect for 28nm HK/MG nMOSFETs under Plasma Nitridation Treatments
2014 Characteristics and Kink Effect under Temperature Stress for 28nm HK/MG nMOSFETs after Plasma Nitridation Treatments
2014 Electrical Performance of n-channel FinFETs with Threshold-voltage Doping Energies under Heating Stress
2014 Temperature Stress Probing Performance of p-channel FinFETs under Different VT Implanting Energies
2014 Photo Matrix Technology Overcoming the Constraint of Nano-node FinFETs
2014 Photocatalytic Study of Bismuth Doped Zinc Oxide Prepared by Spray Pyrolysis:The effect of Annealing
2013 Next Promising P-type FinFET Devices without or with Cobalt-Silicide Applied to the Gate
2013 Impact of Stress Induced by Stressors on Hot Carrier Reliability of Strained nMOSFETs
2013 Characteristics and Hot-Carrier Effects of Strained pMOSFETs with SiGe Channel and Embedded SiGe Source/Drain Stressor
2013 The Improvement of MOSFET Electric Characteristics through Strain Engineering by Refilled SiGe as Source and Drain
2013 The Enhancement of MOSFET Electric Performance through Strain Engineering by Refilled SiGe as Source and Drain
2013 Promising N-type FinFET Devices without or with Cobalt-Silicide Applied to the Gate
2013 The Side Effects on N-type FinFET Devices
2013 The Adjustment of Threshold Voltage on P-type FinFET Devices
2013 The Side Effects and the Effects of Thickness of Source/Drain Fin on P-type FinFET Devices
2013 Body Effect of SiGe and CESL Strained Nano-node NMOSFETs on (100) Silicon Substrate
2013 Probing Moving Charge Distribution of Biaxial and CESL Strained PMOSFETs with Body Effect
2013 High Quality of 0.18um CMOS 5.2GHz Cascode LNA for RFID Tag Applications
2013 Si-Capping Thicknesses Impacting Compressive Strained MOSFETs with Temperature Effect
2013 Electrical Performance of a-Si:H and Poly-Si TFTs with Heating Stress
2013 Strained pMOSFETs with SiGe Channel and Embedded SiGe Source/Drain Stressor under Heating and Hot-Carrier Stresses
2013 Trend of Subthreshold Swing with DPN Process for 28nm N/PMOSFETs
2013 Channel-Length Modulation Effect for 28nm HK/MG PMOSFETs after Post Deposition Annealing Treatment
2013 VT Adjustment for 28nm HfOx/ZrOx/HfOx Gate Dielectric of nMOSFET using DPN Process with Annealing Temperatures
2013 奈米製程CESL壓縮應變與不同矽覆蓋層於pMOSFET之特性與熱載子效應分析
2013 Electrical Performance for 28nm HK/MG PMOSFETs by PDA or DPN Treatment with N2 Concentrations
2013 Punch-Through Characteristics of High-k/Metal Gate NMOSFETs before and after PDA Treatment
2013 Device Characterization for Stacked High-k/Metal Gate of NMOSFETs before and after PDA Process
2013 Gate Leakage Characteristics for 28nm Gate-Last HK/MG NMOSFETs with PDA Process Treatment
2013 Performance Study for 28nm High-k/Metal Gate of PMOSFETs with Gate-Last Process before and after PDA Treatment
2013 Early Effect for 28nm HZH Gate-Stacked NMOSFETs after Post Deposition Annealing Process Treatment
2013 Study of Gate Leakage for 28nm HfZrOx Gate Dielectric of PMOSFETs after Post Deposition Annealing Process
2013 CLM Effect for 28nm Stacked HK/MG NMOSFETs after DPN Process with Different Nitrogen Concentration
2013 Gate Leakage Effect for 28nm HK/MG NMOSFETs after DPN Treatment with Different Annealing Temperatures
2013 Gate Leakage for 28nm High-k/Metal Gate NMOSFETs after DPN Treatment with Different Nitrogen Concentration
2013 Kink Effect for 28nm HK/MG nMOSFETs after DPN Treatment with Different Annealing Temperatures
2013 On the Degradation of Negative Bias Temperature Instability in a-Si:H TFTs
2013 Junction and Punch-Through Leakage Mechanisms for 28nm High-k/ Metal Gate of PMOSFETs after PDA Process Treatment
2013 The Influence of Nitrogen Concentrations and Annealing Temperatures on HfO2 nMOSFET Properties and PBTI Reliability
2013 Electrical Characteristics and Hot-Carrier Effect of Stacked HK/MG nMOSFETs under DPN Treatment plus Annealing Temperatures
2013 Gate Leakage for 28nm HfZrOx Gate Dielectric of PMOSFETs after Decoupled Plasma Nitridation Process with Annealing Temperatures
2013 Early Effect for 28nm HfOx/ZrOy/HfOx Gate Dielectric of NMOSFETs after DPN Process with Different Nitrogen Concentration
2013 Performance of Deep-nano Gate-last HK/MG nMOSFETs using DPN or PDA Process with Annealing Temperatures under Temperature Stress
2013 Study of Gate Leakage Characteristics for 28nm HfZrOx PMOSFETs after DPN Process Treatment with Different Nitrogen Concentration
2013 利用週期性介電質波導設計之環形共振分波器
2012 A Study of Characteristics of Halogen-Free Prevented Solder Materials
2012 Promising Low Noise Amplifiers Using 90nm CMOSFET Devices
2012 Threshold Voltages of MOSFET Devices Using 3-D FinFET Structure
2012 Determination of Threshold Voltages of PMOSFET Devices using FinFET Structure
2012 Threshold Voltages of NMOSFET Devices using FinFET Structure
2012 Predicting Breakdown Characteristics of Nano-scaled HfO2 Gate Dielectric by Ramping Metrology
2012 Fin-Thickness Effects on the Electric Performances of PMOSFET Devices Using FinFET Structure
2012 Fin-Thickness Effects on n-Channel FinFET Devices with Cobalt Silicide as Gate
2012 Strain Effects on Nano-NMOSFET Devices Following Refilled Source/ Drain Silicon Technology
2012 Fin-Thickness Effects on p-Channel FinFET Devices with Cobalt Silicide as Gate
2012 Strain Effects on Nano-NMOSFET Devices with Refilled S/D SiGe Process Technology
2012 Strain Effects on Nano-PMOSFET Devices Fabricated with Refilled S/D SiGe Technology
2012 Fin-Thickness Effects on p-Channel FinFET Devices
2012 Temperature Effects on Drain Fringe Junction Capacitances of Strained pMOSFET Devices
2012 Electrical Characteristics of Amorphous and Poly-Crystalline Thin-Film Transistors with Temperature Effect
2012 Nano-regime Si-Capping Thicknesses Impacting Strained pMOSFET on <110> Silicon Substrate
2012 Phenomenon of nMOSFETs with CESL stressor for different channel lengths
2012 Comparison of NMOSFET and PMOSFET devices that combine CESL
2012 0.18微米製程2.4GHz高輸出增益與低雜訊指數疊接式低雜訊放大器整合於RFID晶片
2012 0.18微米製程5.2/5.8GHz高增益與絕佳隔離之疊接式低雜訊放大器應用於射頻鑑別系統
2012 <100>矽基片奈米p型電晶體在單軸CESL應變下之汲極接面電位研究
2012 <100>矽基片奈米製程MOS電晶體在源/汲極回填矽壓縮應變下之汲極接面電位研究
2012 探討奈米製程CESL壓縮應變於<100>矽基片上p型電晶體之汲極接面電位
2012 CESL壓/拉應變對奈米等級<100>不同通道長度nMOSFETs之汲極接面電位研究
2012 重填矽源/汲極應變和CESL壓縮應變對奈米等級<100> nMOSFET之汲極接面電位研究
2012 奈米製程在單軸CESL拉伸應變於<100>晶圓表面上nMOSFET之汲極接面電位研究
2012 <110>矽基片45奈米電晶體在CESL應變與矽鍺回填源/汲極製程下之接面效能研究
2012 射頻鑑別系統中2.4GHz高增益/高隔離度串接式低雜訊放大器
2011 Distinguishing Junction Breakdown and Punch-through Characteristics for Uniaxial CESL Strained Nano-regime N/PMOSFETs on <100> Silicon Substrate
2011 Promising Reliability of Refilled S/D Strained N/PMOSFET Devices Fabricated on <100> Substrate Linked to Junction Breakdown, and Punch-Through
2011 Distinguishing Reliability of CESL Strained N/PMOSFET Devices Fabricated on <110> Substrate Correlated with Junction Breakdown, and Punch-Through
2011 Distinguishing Characteristics of Refilled S/D Strained NMOSFET Devices Fabricated on <110> Substrate Associated with Junction Breakdown, and Punch-Through
2011 Promising Characteristics of CESL Strained PMOSFET Devices Fabricated on <100> Substrate Correlated with Junction Breakdown, and Punch-Through
2011 Distinguishing Repeatability of CESL Strained NMOSFET Devices Fabricated on <100> Substrate Associated with Junction Breakdown, and Punch-Through
2011 Characteristics of SiGe Channel and Embedded SiGe S/D Strained PMOSFETs
2011 Characteristics of the Hot-Carrier Effect on Strained nMOSFETs with Tensile and Compressive CESL Stressors
2011 IMC Integrity for Sn96.7?Ag3.7 Polymer Core Solder Ball in BGA Package
2011 Drop Test for Sn96.7?Ag3.7 Polymer Core Solder Ball in BGA Package
2011 Reflow Influence for Sn96.7?Ag3.7 Polymer Core Solder Ball in BGA Package
2011 Solder Stability for Pb?free HBGA Assembly with Oxygenous Reflow
2011 Nickel Solder Ball Performance for Pb?free LFBGA Assembly under Oxygenous Reflow
2011 Oxygenous Reflow Affecting Performance of Pb?free TFBGA Assembly
2011 SOP Package Surface Discoloration after PCT Test
2011 3.5 GHz to 10.0 GHz Mixers of High Gain and Good Isolations
2011 Embedded SiGe Source/Drain and Temperature Degrading Junction Performance on <110> 45 nm MOSFETs
2011 Deterioration of Junction Performance with Temperature Effect for 45 nm Si-Capping MOSFETs on <110> Silicon Substrate
2011 Nano-Scale Si-Capping Thicknesses Impacting Junction Performance on <110> Silicon Substrate
2011 Study of Temperature Effects of Mobility, Swing, and Early Voltages on Strained MOSFET Devices
2011 Current Conduction Mechanisms of 0.65 nm Equivalent Oxide Thickness HfZrLaO Thin Films
2011 Time Dependent Dielectric Breakdown (TDDB) Characteristics of Metal-Oxide-Semiconductor Capacitors with HfLaO and HfZrLaO Ultra-Thin Gate Dielectrics
2011 Promoted Electrical Performance and Temperature Effects of Strained Short-Channel Transistors
2011 6.0-10.1 GHz High-Gain Mixer
2011 12GHz~ 18GHz High Gain Low Noise Amplifier
2011 Variation of Channel Resistance for Nano-regime MOSFETs under Different Si Capping Thickness Depositing CESL Inducing Compressive Strain on <110> Si Wafer
2011 Compressive/ Tensile Strained CESL Impacting Channel Resistance for Nano-regime <100> nMOSFETs
2011 Channel Resistance for Nano-regime Biaxial Strained MOSFETs on <110> Silicon Substrate
2011 A Study of Channel Resistance and Temperature Effect for <110> pMOSFET with Embedded SiGe Source/Drain Technology
2011 Junction Leakage Performance with Temperature Effect for <110> 45 nm pMOSFETs Applied with Si-Capping and Refilled Source/Drain Process Technology
2011 Variation of Channel Resistance for Nano-regime pMOSFETs under Refilled S/D SiGe Strain and Different Si Capping Thicknesses on <110> Si Wafer
2011 Resistor Characteristics of Uniaxial CESL Strained Nano-regime nMOSFETs on <100> Silicon Wafer
2011 Junction Leakage Efficiency for Nano-regime nMOSFETs between Si Capping Layers on <110> Wafer and Conventional <100> Wafer
2011 Nano-regime pMOSFET Channel Resistance with Non-strained <100> and Strained <110> Wafers
2011 A Study to Channel Resistance for <100> Strained PMOSFETs with Different Si Capping Layers
2010 Miniaturization of Cascode Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID Applications
2010 Minimizing Size of Cascade Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID Applications
2010 Optimization of First-Stage cascode Low-Noise Amplifier with 0.18um CMOS Process for 2.4GHz RFID Applications
2010 Contrivance and Proof of Ladder-Like Antenna for 2.46GHz RFID Applications
2010 Design and Proof of Spiral-Like Antenna for 2.45GHz RFID Tag Applications
2010 Clamp-Like Planar Antenna for 2.45GHz RFID Tag Applications
2010 Mobility Enhancement on Nano-strained NMOSFET with Epitaxial Silicon Buffer Layers
2010 CESL Deposition Promoting n/p MOSFETs under 45-nm-node Process Fabrication
2010 ELFR Experiment Test Verifying Anomaly of Nano-DRAM Products in W-Plug Process
2010 Study of Nano-regime Strained MOSFETs with Temperature Effect
2010 C-V Analysis and Degradation of HC Stress near Vt Bias for CLC Poly-Si n-TFTs with Laser Annealing Powers
2010 Temperature Dependence of Carrier Mobility Variation in Nanoscale Strained (110) MOSFETs
2010 Characteristics of Uni-axial Strained Nano-scale nMOSFETs with CESL Process on <100> Silicon Substrate
2010 A Study on N/P-Type Short / Long Channel Strained Devices on <100> Substrate with Various Thicknesses of Si-Cap Layer at Different Testing Temperatures
2010 Performance of Nanoscale Strained PMOSFET Devices Measured at Different Temperatures
2010 N/PMOSFET Characteristics Fabricated on <100> Silicon Substrate Using Strained Technology at Different temperatures
2010 Characterization of Strained MOSFETs with Tensile and Compressive CESL Stressors
2010 Degradation Mechanism for CLC Poly-Si n-TFTs under Low Vertical-Field HC Stress with Different Laser Annealing Powers
2010 Promising 5.0-16.0 GHz CMOS-Based Oscillators With Tuned LC Tank
Year Title
2011 新世代積體電路製程技術
2008 薄膜電晶體液晶顯示器原理與實務
Year Title
2012 先進微影製程
2012 IC Measurement and Reliability Analysis
Year Title
2023 Enhancing the Tunable Sensitivity of a Near-Ultraviolet to Visible to Near-Infrared Photo Irradiance Sensor Using an Indium Tin Oxide-Aluminum Oxide-Zirconia Aluminum Oxide-Silicon
2022 Channel Mobility Model of Nano-Node MOSFETs Incorporating Drain-and-Gate Electric Fields
2022 Visible-light Photocatalytic Study of SnOx:N Islands on Bi2MoO6
2022 Low-Frequency Vibration Sensor with Dual Fiber Fabry-Perot Interferometer Using a Low-Coherence LED
2022 Electrical Performance of 28 nm-Node Varying Channel-Width nMOSFETs under DPN Process Treatments
2021 High-drain Field Impacting Channel-length Modulation Effect for Nano-node n-channel FinFETs
2021 Study of N-doping in (Bi2MoO6, MoO3)/SnOx:N Photocatlyst in the Degradation of RhB Using Visible Light
2020 On the Nitrogen Doping in Erbium and Nitrogen codoped Magnesium Zinc
2020 Uniformity of Gate Dielectric for I/O and Core HK/MG pMOSFETs with Nitridation Treatments
2020 Hot Carrier Stress Sensing Bulk Current for 28-nm Stacked High-k nMOSFETs
2020 Q-factor Performance of 28 nm-node High-k Gate Dielectric under DPN Treatment at Different Annealing Temperatures
2019 Electrical Characteristics of n-type FinFETs under VT Ion Implantation on SOI Substrate
2018 Thickness Study of Er-Doped Magnesium Zinc Oxide Diode by Spray Pyrolysis
2018 Thermal Stress Probing the Channel‐length Modulation Effect of Nano N-type FinFETs
2018 Electrical Stress Probing Recovery Efficiency of 28nm HK/MG nMOSFETs using Decoupled Plasma Nitridation Treatment
2018 Resistance Study of Er-doped Zinc Oxide Diode by Spray Pyrolysis
2018 I-V Model of Nano nMOSFETs Incorporating Drift and Diffusion Current
2018 Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs
2018 Carrier Concentration of Calcium Zinc Oxide with Different Calcium Contents Deposited through Spray Pyrolysis
2018 Electrical and physical characteristics of WO3/Ag/WO3 sandwich structure fabricated with magnetic-control sputtering metrology
2017 Performance Characteristics of p-channel FinFETs with Varied Si-fin Extension Lengths for Source and Drain Contacts
2016 DPN Treatment plus Annealing Temperatures for 28nm HK/MG nMOSFETs with CHC Stress
2016 The Integrity of 28nm HK/MG nMOSFETs Probed with Drain Bias Stress
2016 A high aspect ratio silicon-fin FinFET fabricated upon SOI wafer
2015 Kink effect for 28 nm n-channel field-effect transistors after decoupled plasma nitridation treatment with annealing temperatures
2015 Comparison of electrical characteristics for SiONx and HfZrOx gate dielectrics of MOSFETs with decoupled plasma nitridation treatment
2015 Conductivity Study of Nitrogen-Doped Magnesium Zinc Oxide Prepared by Spray Pyrolysis
2015 Heat Stress Exposing Performance of Deep-nano HK/MG nMOSFETs using DPN or PDA Treatment
2015 Leakage Current Mechanism and Effect of Y2O3 Doped with Zr High-K Gate Dielectrics
2014 Impact of Stress Induced by Stressors on Hot Carrier Reliability of Strained nMOSFETs
2014 Characteristics and hot-carrier effects of strained pMOSFETs with SiGe channel and embedded SiGe source/drain stressors
2014 Early Effect for 28nm HK/MG PMOSFETs after Post Deposition Annealing Treatment
2014 Threshold Voltage Adjustment for 28nm HfOx/ZrOx/HfOx Gate Dielectric of nMOSFETs using DPN Process with Annealing Temperatures
2014 Punch-through and junction breakdown characteristics for uniaxial strained nano-node metal-oxide-semiconductor field-effect transistors on (100) wafers
2014 Gate Leakage Characteristics for 28nm HfZrOx PMOSFETs after DPN Process Treatment with Different Nitrogen Concentration
2014 Gate Leakage for 28nm Stacked HfZrOx Dielectric of p-channel MOSFETs after Decoupled Plasma Nitridation Treatment with Annealing Temperatures
2014 Modification of Early Effect for 28nm nMOSFETs Deposited with HfZrOx Dielectric after DPN Process Accompanying Nitrogen Concentrations
2013 Mixers of Ultra-High Gain from 5.0 to 18.0 GHz
2013 Comparison of NMOSFET and PMOSFET Devices That Combine CESL Stressor and SiGe Channel
2013 奈米製程中應變工程對MOS元件效能之影響
2012 High-Performance III-V MOSFET with Nano-stacked High-k Gate Dielectric and 3D Fin-shaped Structure
2012 Time Dependent Dielectric Breakdown (TDDB) Characteristics of Metal-Oxide- Semiconductor Capacitors with HfLaO and HfZrLaO Ultra-Thin Gate Dielectrics
2012 Interface trap generation and recovery mechanisms during and after positive bias stress in metal-oxide-semiconductor structures
2012 Reliability Characteristics of Metal-Oxide-Semiconductor Capacitors with 0.72 nm Equivalent-Oxide-Thickness LaO/HfO2 Stacked Gate Dielectrics
2011 Drive Current and Hot Carrier Reliability Improvements of High-aspect-ratio N-channel Fin-shaped Field Effect Transistor with High-tensile Contact Etching Stop Layer
2011 CESL Deposition Enhancing Performance of n/pMOSFETs under 45-nm Process Manufacture
2011 Probing Drain Current with Vertical and Horizontal Electrical Fields under Temperature Stress on CLC TFTs
2011 Instability Effect on CLC nTFTs with Positive-Bias Temperature Stress
2011 Probing Active-Area Shift with Improved Kelvin Measurement for Trench DRAM
2011 Collar TEOS Integrity of Deep Trench DRAM Capacitor with a Vertical Parasitic NMOSFET
2011 Surface Channel Hot-Carrier Effect on CLC n-TFTs
2011 Surface-Channel Drain-Avalanche Hot-Carrier Effect under Temperature Variation on CLC TFTs
2011 Minimization of Cascade Low-Noise Amplifier with 0.18um CMOS Process for 2.4 GHz RFID Applications
2011 Parasitic Effect Degrading Cascode LNA Circuits with 0.18um CMOS Process for 2.4GHz RFID Applications
2011 A Monopole Scoop-Shape Antenna for 2.4GHz RFID Applications
2011 MOSFET Performance Manufactured on <100> Silicon Wafer Using CESL Strain Technology with Temperature Effect
2011 Performance of Surface Carrier Mobility for Nano-node Strained (110) MOSFETs with Temperature Effect
2011 A Non-destructive and Effective Metrology to Automatically Monitor Kink Effect of MOSFETs
2011 Extensive 6.0-18.0 GHz Frequency Low Noise Amplifiers Integrated to Form LC-Feedback Oscillators
2011 Evaluation of the Capacitances by Using High Frequency Roll-Off Fitting to the second order approximation
2011 Evaluation of the Dielectric by Measuring Leakage Currents on Self-Built Capacitor-Like Devices
2011 Effective Edge Width for 65-nm pMOSFETs and Their Variations under CHC Stress
2011 Performance of Uni-axial Strained Nano-regime nMOSFETs with CESL Process on <100> Silicon Substrate
2011 Degradation Mechanism for Continuous-Wave Green Laser-crystallized Polycrystalline Silicon n-Channel Thin-Film Transistors under Low Vertical-Field Hot-Carrier Stress with Different Laser Annealing Po
2010 Promoting of Charged-Device Model/Electrostatic Discharge Immunity in the Dicing Saw Process,”
2010 Substrate Current Verifying Lateral Electrical Field under Forward Substrate Biases for nMOSFETs
2009 Gate-to-drain capacitance verifying the CGLC n-TFT trapped charges distribution under DC voltage stress
2009 Trend Transformation of Drain-current Degradation under Drain-avalanche Hot-carrier Stress for CLC n-TFTs
2008 Layout Dependence of ESD Characteristics on High Voltage LDMOS Transistors
2008 A gold-nanoparticle-enhanced immune sensor based on fiber optic interferometry
2008 he Switch of the worst case on NBTI and hot carrier reliability for 0.13 um PMOSFETs
2008 Dual Fiber-Optic Fabry-Perot Interferometer Strain Sensor with Low-Cost Light-Emitting Diode Light Source
2008 Dual Fiber-Optic Fabry-Perot Interferometer Temperature Sensor with Low-Cost Light-Emitting Diode Light Source
2008 Investigation of DC Hot-Carrier Degradation at Elevated Temperatures for p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors of 0.13 um Technology
2008 Visible Light Source Disturbing the Source/Drain Current of CLC Poly-Si n-TFT Device
2008 Enhanced Drain Current Ripple Variation with Vertical and Horizontal Electrical Fields under Optical Illumination
2008 Promotion of ESD-CDM Immunity in Dicing Saw Process
2008 Dual FFPI Strain Sensor with Low-Cost LED Light Source
2008 Extra-Inversion Charge Enhancing Substrate Current During Increased Substrate Bias in 90nm Process
2005 探討射頻積體電路矽基材單晶片的可行性
2005 深次微米製程中元件NBTI與HCE的可靠性研討
2004 A Powerful Electrical Probing Method to Detect the Kink Effect of MOSFET Devices
2004 Low Phase-Noise CMOS Voltage-Controlled Oscillator for ISM Band”, Journal of Da-Yeh University
Year Title
2024 全校教師教學暨輔導知能精進研討會-ChatGPT對於教育領域的影響與實務應用
2024 2024年第四屆工程科技與技術應用研討會
2023 全校教師教學暨輔導知能精進研討會-淨零轉型下綠色永續科技發展趨勢
2023 全校教師教學暨輔導知能精進研討會-私校退撫儲金-您的基本權益
2023 認識投資的本質，從生涯學習
2023 10th IEEE and 11th The International Conference on Science, Education and Viable Engineering (ICSEVEN 2022)
2023 2023_01_05國際大師演講-Dr. Philip Wong
2023 111學年度第2學期追夢辦公室-機械工程系專題講座(Malaysia Your Favourable Investment Destination)
2023 IEEE ICEIB2023
2023 111學年度第2學期追夢辦公室-機械工程系專題講座(Artificial Intelligence: Is it Safe? )
2023 111學年度第2學期追夢辦公室-機械工程系專題講座(技職體系的職涯發展 )
2023 半導體材料、設備與檢測論壇
2023 IEEE WiPDA-Asia2023
2023 12th IEEE & 13th ICSEVEN 2023
2023 112學年度第1學期明新科技大學工程學院、半導體學院專題講座(半導體產業的精彩世界)
2023 2023明新科技大學第三屆工程科技技術應用研討會
2023 112年新竹縣政府青年志願服務(教育類)運用單位在職訓練
2023 111學年度第二學期全校教師教學暨輔導知能精進研討會
2023 112-1全校教師輔導知能研習-校園性別事件樣貌與案例分享-以師生案之處理為核心
2022 IEDMS2022
2022 2022年通識教育教學創新與實踐學術研討會
2022 2022第十八屆全國電子設計創意競賽暨學術研討會
2022 9th IEEE and 10th The International Conference on Science, Education and Viable Engineering (ICSEVEN 2022)
2022 2022年工程科技技術應用研討會
2021 2021第十七屆全國電子設計創意競賽暨學術研討會
2021 IEEE ISNE2021
2021 2021明新科技大學工程科技技術應用研討會
2021 110學年度第1學期追夢辦公室-機械工程系專題講座(我的學術日常)
2020 學術倫理教育訓練
2020 2020 4th International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2020)
2020 臺灣學術倫理教育資源中心
2020 IEEE ICKII2020
2020 IEDMS2020
2020 109年明新科大工學院跨領域講座-自駕車大未來(溫峻瑜)
2020 如何藉由創新發明賺進人生第一桶金
2020 109 年明新科大工學院跨領域講座-人工智慧應用與發展(周至宏)
2020 109 年明新科大工學院跨領域講座-快雷射精密加工及應用(李俊豪)
2020 109 年明新科大工學院跨領域講座-2020 AI Paris 創新跨域應用(李峮慧)
2020 民族主義與客家文化的傳播
2019 IEEE ISNE 2019
2019 IEDMS2019
2019 36.2019 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2019)
2019 2nd Annual International Conference on Control, Automation and Electrical Systems (ICCAES2019)
2019 42.International Congress on Advanced Materials Sciences and Engineering (ICAMSE-2019)
2019 42.International Congress on Advanced Materials Sciences and Engineering (ICAMSE-2019)
2019 IEEE IPFA2019
2019 IEEE IPFA2019
2018 2018 International Electron Devices & Materials Symposium (IEDMS 2018)
2018 IEEE ISNE 2018
2018 ICEO&SI 2018
2018 2018 International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2018)
2018 2nd annual conference on Cloud Technology and Communication Engineering (CTCE2018)
2018 2018 the 2nd annual International Conference on Wireless Communications, Networking and Applications [WCNA 2018]
2018 2018 2nd International Conference on Material Engineering and Advanced Manufacturing Technology (MEAMT 2018)
2014 International Electron Devices and Materials Symposia
2014 IEEE International Conference on Electron Devices and Solid-State Circuits
2014 IEEE International Symposium on Next-Generation Electronics (ISNE 2014)
2013 Circuit Design using FinFETs
2012 混合訊號與射頻電路設計領域課程發展計畫課程成果發表會
2012 雲端科技-見證永恆的愛
2012 2012 International Conference on Commercialization of Transducer & MEMS
2012 2012 International Conference on Commercialization of Transducer & MEMS
2012 10th Conference on Microelectronics Technology and Applications
2012 IEEE/ 2012 International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP)
2012 2012電子工程技術研討會
2012 2012 International Electron Devices and Materials Symposium (IEDMS)
Year Title
2023 10th IEEE & 11th ICSEVEN 2022- 口頭最佳論文獎
2023 明新科大 111學年度 績優教師
2023 10th IEEE & 11th ICSEVEN 2022- 學術貢獻獎
2023 3rd IEEE ICEIB2023 最佳論文獎
2023 12th IEEE & 13th ICSEVEN 2023- 學術成就獎
2023 12th IEEE & 13th ICSEVEN 2023- 海報組 最佳論文獎
2022 9th IEEE ICSEVEN 國際研討會 - 最佳學者獎
2022 2022第十八屆全國電子設計創意競賽暨學術研討會 最佳論文獎
2021 明新科大 109學年度 績優教師
2019 工業局 智慧電子學院 績優教師
2019 MEAMT2019 最佳論文審核委員獎
2018 106學年度 明新科大 績優教師
2018 MEAMT2018 最佳論文審核委員獎
2017 工業局/智慧電子學院 績優教師
2017 MEAMT2017 國際研討會 (2017/9) 最佳論文審核委員獎
2017 溫度調變下不同p通道鰭式電晶體之DIBL變化 - 優秀論文獎
2016 微影曝光能量參數調變對n型奈米鰭式電晶體之電特性研究- 論文組 第一名
2015 工業技術研究院 績優教師
2015 模範教師獎
2012 2012 ETS 口頭優秀論文獎
2012 光電平面顯示器概論
2012 模範教師獎
2011 模範教師獎
2011 模範教師獎